keep in mind i am just giving my opinion. from a risk/reward perspective it just doesnt seem like a good decision, then again it is intel.

also better floorplanning could easily increase FETs/mm2.

http://yfrog.com/49iacores2p
here is a comparison of intel's cores. they are normalized by height. you can see that the datapath in the upper right keeps getting proportionally smaller until sandy bridge.
Quote Originally Posted by Opteron146 View Post
Just read Hans' post here:



http://www.amdzone.com/phpbb3/viewto...rt=875#p185515

It has to be hyper pipelined, because the FPU is nearly unchanged from Westmere's but - according to intel - it should be able to handle 256bits in 1 clock. Thus the FPU has to be double clocked. Plain logic.

If you deny it, then you have to point out the 256bit units on SB's die plot.

cheers

P.S: Who else if not intel has "experienced designers" ? ;-)
no one can point out sb's alu's. individual units have been invisible to the naked eye for many years now.

yes, intel has experienced engineers but not enough. also they need to use them effectively due to their scarcity.