AMD cuts to the core with 'Bulldozer' Opterons

[Opteron146]

i really dont think that they will use double pumping, hyperpipelining, or whatever you want to call it in sandy bridge. it caused a lot of issues in netburst. to put it simply making alu's clock 2x faster is very complex, it takes experienced designers and many circuit simulations to assure robustness. it is much more productive having these people work on other parts of the chip, like designing a really fast L1 cache, high speed I/O, or power/clock gating.

Just read Hans' post here:

Note that the way Intel implements 256 bit AVX is somewhat of a trick to
avoid bloating up the core to much. They actually used a 128 bit unit which
runs at double the clock speed because they "hyper-pipelined" it .

The FP/SSE/AVX area on the Sandy Bridge die is only slightly greater as
the FP/SSE unit on Westmere. It does have consequences for the power
consumption however and Sandy Bridge will be about as large a single
Bulldozer module anyway.

http://www.amdzone.com/phpbb3/viewto...rt=875#p185515

It has to be hyper pipelined, because the FPU is nearly unchanged from Westmere's but - according to intel - it should be able to handle 256bits in 1 clock. Thus the FPU has to be double clocked. Plain logic.

If you deny it, then you have to point out the 256bit units on SB's die plot.

cheers

P.S: Who else if not intel has "experienced designers" ? ;-)