Quote Originally Posted by informal View Post
Intel would first have to put that thing on the roadmap and then play that game . And as things are right now,there is not even a hint of such a design. 2 years per design cycle and maybe in 2012 we can see such a product. I don't think that current server socket that will host SB EX can support 2 SB dice linked via QPI.
The MCM approach is only for yields / costs. And that would not take 2 years, and who's to say they aren't already at work on it?

Just bumping the number of cores would be the more expensive, less design-work way to do it. Surely you don't think *that* would take them all that long, given the plethora of SB variants already coming?