Quote Originally Posted by Mumak View Post
I haven't noticed the author..
Oh Sascha
You know how to find me... But you also know I'm not allowed to give any details/info..
oh stop it, always teasing with all the things you know and then not telling anything :P
at least hint at whats wrong so i can try to find an answer somewhere else :P

Quote Originally Posted by ajaidev View Post
--Snip--
oh come on guys! dont tell me i got it all wrong and its misleading and then leave me standing in the rain :P
at least hint at what was misleading... calling cache associativity cache width?

Quote Originally Posted by terrace215 View Post
The semiacc author is practically suggesting that 2/4 is a Westmere core bolted to a new uncore with GPU on die, oh, and, uh, plus AVX... or something.
i wrote it, and thats not true about it?

Quote Originally Posted by terrace215 View Post
Even Intel has now publicly said "significant IPC improvement" about the 2/4 parts. I don't think that means AVX.
where have they said that? and how would they achieve significant ipc improvements?
they havent mentioned anything that could potentially improve ipc significantly...

Quote Originally Posted by terrace215 View Post
-More efficient: the central processing unit, or CPU, delivers a "significant improvement in instructions per clock," according to Perlmutter, meaning that it is more efficient at executing tasks.
they ALWAYS say that for EVERY new cpu... they said that about nehalem as well and it ended up with almost the same ipc in most apps as c2d... :P

Quote Originally Posted by terrace215 View Post
-Faster on-chip communication: different parts of the chip will talk to each other faster--what Perlmutter called "improved inter-buses."
revamped cache, i mentioned that...

Quote Originally Posted by terrace215 View Post
-Shared memory: on-chip memory called cache is shared between the CPU and graphics processing unit, or GPU.
so reducing the L3 cache from 4 to 3mb and reducing it from 16way to 12way associative and THEN sharing it not only between 2 cores but the gpu as well... thats improving ipc how? :P

Quote Originally Posted by terrace215 View Post
-GPU now part of CPU: Intel combines the CPU and GPU on the same piece of silicon. According to an unofficial photo of the Sandy Bridge chip from Japanese Web site PC Watch, the GPU takes up roughly 25 percent of the processor's real estate.
and that affects ipc how...? :P

Quote Originally Posted by terrace215 View Post
-New instructions: Sandy Bridge will be the first chip to support Intel's Advanced Vector Extension (Intel AVX) instructions. AVX accelerates a host of multimedia tasks, including video and audio processing.
new instructions will result in a boost in a few apps only at launch, if even that... i wouldnt count this as ipc boost, and you said you "heard" ipc improvements beyond avx, right?

Quote Originally Posted by terrace215 View Post
-More intelligent overclocking: and, finally, Perlmutter mentioned improved Turbo Boost--which speeds up (i.e., "overclocks") or slows down individual cores to meet processing or power efficiency needs.
this adjusts clocks, not ipc... so again, where are those ipc improvements intel supposedly raved about? :P

Quote Originally Posted by Raqia View Post
Seems like a lower baseclock will allow for finer control of turboboost.
yeah, thats a good point... now its 100mhz steps and not 133 anymore... wont make a huge difference but should help a bit to maybe get higher turbo multis and lower idle clocks