While 512 bit buswidth is rather out of question, wouldn't it be so sweet if Cypress was equipped with 384 bit buswidth, if it comes as a 360 mm^2 chip, i think it wouldn't be pad limited. Just imagine, a 360 mm^2 chip with 1920 SPs, 96 TMUs, 36 RBEs on 384 bit buswidth (6 RBEs per 64 bit mem controller) using 1.5 GB of 1.2 GHz GDDR5 chips, greatness !!