AMD embraces AVX making a new superset with SSE5(256bit support)

[informal]

Even if you have it, you go there and lost 1 entire day comparing 100++ instructions 1 by 1? Ya right

Shintai is bsing again.AMD has no reason to post AVX spec since its intel's specification and its on intel's site.AMD clearly said,in no uncertain terms, they will support AVX version 5 and FMA version 3 in BD cores.It can't be any clearer.What this means is that instruction format must be equivalent between SB and BD in order to run the AVX optimized code written for SB on BD or the other way around. Both specs,for AVX nad FMA are available on intel's webpage covering AVX.
What SB won't have is any form of FMA(this is current official stance at intel).SB will have "basic" AVX ,with new media instructions and wider vector support.By the time intel gets to implement FMA at all,AMD's FMA4 approach (which is superior without a doubt) will be on the market for some time already and will probably make intel adopt it or make their own similar(to AMD's) 4 operand fused multiply add format.

^Actually, SSE5's outline was released 8 months before Intel's AVX and Intel seemingly implemented quite a bit of SSE5.

Yes,but AMD played it safe this time and now will support both AVX and it's own XOP,CVT16,FMA4 extensions in one set(call it AVX2 if you like).The XOP etc. additional set is a "remnant of SSE5",the instructions that were not covered by AVX are still implemented as a bonus set(a la 3Dnow,lets hope they will get used this time around). This means a lot for software developers who will have a much easier time coding for common instruction set instead of optimizing for different ones-both devs and consumers will benefit from this. They can also optimize for FMA4 and XOp since BD will offer these too,a clear advantage for AMD.