Some CL8 32M runs, with the CS3222271. CL7 to follow.

32M details: XP SP2, 1 hard disk, no tweaks or C/W, tREF adjusted in Memset as shown.

BIOS 1001 and 0403 / vDIMM 1.90-1.95V / vNB 1.6-1.72V


a 200/333 strap comparison first (0403 BIOS)

500x9 / 1:2 / 333 strap / CL8 / CT Strong / tRD7





the extra Read from 200 strap/tRD 6 beats the 333strap/tRD 7 by almost 2.5 seconds for 500x9 time.

500x9 / 1:2 / 200 strap / CL8 / CT Strong / tRD6





the board loosens at 500FSB on any strap, so booting at 499FSB gives better bandwidth and latency.
(2-300Mb/s Read and 0.5ns Latency difference going from 499-500FSB for same other settings)

500x9 / 1:2 / 200 strap / CL8 / CT Strong / tRD6 / tRFC 72

(499FSB boot + 1mhz FSB Joystick + tREF 16383T)





I gave up trying to get 'close' to 10 minutes with CL8 and 4500mhz

499x9.5 / 1:2 / 200 strap / CL8 / CT Strong / tRD6 / tRFC 72

(tREF 16383T)





500x9.5 / 1:2 / 200 strap / CL8 / CT Strong / tRD6 / tRFC 72

(499FSB boot + 1mhz FSB Joystick + tREF 16383T)





Everest scores might have been better but CPU stuck at 50% load after 32M

625x7.5 / 5:8 / 333 strap / CL8 / CT Auto / tRD9

(tRFC AUTO (110) / tREF 6240)