Quote Originally Posted by Helmore View Post
Uhm I'm not exactly getting what you are saying.
Are you saying that the NMOS driver current of 1354μA/μm on AMD's 45 nm. process is the same as on Intel's 45 nm. HKMG process, even though AMD's process does not use HKMG? Or is that NMOS driver current of AMD's 45 nm. process the same as what Intel would get if they had a 45 nm. process that did not use HK materials and metal gates?

I'm guessing the former....
Indeed.

Quote Originally Posted by Helmore View Post
Could it be that their C3 revision of Shanghai and Deneb will implement these optimizations?

I don't know, but I guess not. I guess it would be a later revision.

Quote Originally Posted by Helmore View Post
That could explain the lower TDPs on their AM3 Deneb chips.
Is it really lower? Once you need to increase voltage to go faster you
get a 3rd power law:

95W x (3.0 GHz / 2.8 GHz)^3 = 123W

So 95W for a 2.8GHz versus 125W for a 3.0GHz seems inline with this.


Regards, Hans