SSD Write Endurance 25nm Vs 34nm

[zads]

...It just didn't like 9 days without power.

...This data retention issue does however bring an element of frustration to the testing. Is a year unreasonable? How much of an impact does that requirement have on how the MWI is calculated? At what point should you stop writing and for how long should you then wait?....

Maybe something kept the M4 controller from reinitializing on power on? I find it hard to believe that the M4 just quit working after being powered off for a few days....

...Once the unpowered data-retention time gets down to a few days, powering off the SSD for several days causes most of the flash to lose its charge. Since the SSD stores critical metadata on the flash, the SSD cannot operate once most of the flash has lost its charge.

You guys are on the right track here.
The flash manufacturers rate the PE cycle based on flash data retention and correctability given the amount of spare ECC area on each page and how much that can correct. So you can theoretically run 200%, 300% etc of the PE cycle, but you're gonna get more and more probability of errors or failed drives. The bit error probability skyrockets above the 10^(-15) error rate that most consumer drives quote at this point. When a IMFT 25nm drive starts out, it is likely well beyond a 10^(-20) unrecoverable bit error rate.
Throw in things like temperature variations, background radiation, etc, and you have a smattering of other error inducing mechanisms.
The reason its not booting up is likely that the last remaining firmware copy in your flash got corrupted beyond recoverability.

True enterprise SLC and MLC drives actually push more width and more layers of error correction mechanisms into the drive, which ultimately gives them longer data retention and lower unrecoverrable bit error rates than consumer drives, from infancy to EOL.