All that remains: QPI.Originally Posted by p3gaz_001
i've increased ioh to 1.24 and ich 1.20, and it seems to work much better, 985mhz with the two cards....that's ok for now, but the cpu is horribly unstable .... bsod very often while running 3dmark vantage ....
Remember, adding another GPU causes more QPI traffic(two gpu's talking to the cpu instead of just one).
Here's my template at 4.2 200bclk:
Code:Target CPU Frequency 4200MHz Target DRAM Frequency 2005MHz LN2 Mode [Disabled]*** QPI Loadline Calibration [Enabled]*** Sync Mode [] AI Overclock Tuner [Manual] OC From CPU level Up [Auto] 2D Performance Booster [Disabled] CPU Ratio Setting [21.0] CPU Turbo Power Limit [Disabled] >CPU Configuration---------------------------- CPU Ratio Setting [21.0] C1E Support [Enabled] Hardware Prefetcher [Enabled] Adjacent Cache Line Prefetch [Enabled] MPS and ACPI MADT ordering [Modern ordering] Intel(R) Virtualization Tech [Enabled] CPU TM Function [Disabled] Execute Disable Bit [Enabled] Intel(R) HT Technology [Enabled] *Active Processor Cores [All] A20M [Disabled] *Intel(R) SpeedStep(TM) Tech [Enabled] Intel(R) C-STATE Tech [Enabled] C State package limit setting [Auto] C1 Auto Demotion [Auto] C3 Auto Demotion [Auto] ---------------------------------------------- BCLK Frequency [200] PCIE Frequency [100] DRAM Frequency [DDR3-2005MHz] UCLK Frequency [3608MHz] QPI Link Data Rate [7218] Memory Configuration Protect [Disabled] >DRAM Timing Control-------------------------- CAS# Latency [ 7 DRAM Clock] RAS# to CAS# Delay [ 9 DRAM Clock] RAS# PRE Time [ 7 DRAM Clock] RAS# ACT Time [24 DRAM Clock] RAS# to RAS# Delay [4] REF Cycle Time [88] WRITE Recovery Time [10] READ to PRE Time [6] FOUR ACT WIN Time [24] Back-To-BackCAS# Delay [Auto] Timing Mode [1N] Round Trip Latency on CHA [Auto] Round Trip Latency on CHB [Auto] Round Trip Latency on CHC [Auto] tRL CHA [-1] tRL CHB [-1] tRL CHC [-1] WRITE To READ Delay(DD) [Auto] WRITE To READ Delay(DR) [Auto] WRITE To READ Delay(SR) [Auto] READ To WRITE Delay(DD) [Auto] READ To WRITE Delay(DR) [Auto] READ To WRITE Delay(SR) [Auto] READ To READ Delay(DD) [Auto] READ To READ Delay(DR) [Auto] READ To READ Delay(SR) [Auto] WRITE To WRITE Delay(DD) [Auto] WRITE To WRITE Delay(DR) [Auto] WRITE To WRITE Delay(SR) [Auto] ---------------------------------------------- CPU Differential Amplitude [Auto] CPU Clock Skew [Auto] IOH Clock Skew [Auto] ------------ Extreme Engine Digi+ ------------ Digi+ PWR Mode [T-Balanced] PWM Volt. Control [Auto] Load-Line Calibration [Full Calibration] CPU Voltage OCP [Enabled] CPU PWM Frequency [500KHz] Extreme OV [Disabled] Extreme OC [Auto] CPU Voltage [1.37500] CPU PLL Voltage [1.25625] QPI/DRAM Core Voltage [1.35000] DRAM Bus Voltage [1.65625] >DRAM REF Voltages---------------------------- DRAM DATA REF Voltage on CHA [Auto] DRAM CTRL REF Voltage on CHA [Auto] DRAM DATA REF Voltage on CHB [Auto] DRAM CTRL REF Voltage on CHB [Auto] DRAM DATA REF Voltage on CHC [Auto] DRAM CTRL REF Voltage on CHC [Auto] ---------------------------------------------- IOH Voltage [1.20525] IOH PCIE Voltage [Auto] ICH Voltage [1.16600] ICH PCIE Voltage [Auto] ---------- Spread Spectrum Control ----------- CPU Spread Spectrum [Disabled] PCIE Spread Spectrum [Disabled] ***on-board jumper dependant
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