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Thread: AMD cuts to the core with 'Bulldozer' Opterons

  1. #376
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    Quote Originally Posted by JF-AMD View Post
    Yes, we have development in India, they're awesome folks, I think they did a lot of the Istanbul work, very solid team. But, I am pretty sure that first silicon does not land there, as they are a design organization as I understand it. First silicon goes to test organizations.

    The issue is that if we were going to "leak" parts out, it would actually be my call as the director of marketing. And I can tell you that I wouldn't approve that. Especially early Bulldozer silicon. Trust me, the first rev is always pretty rough relative to the final (except Istanbul where first silicon was final silicon.)
    So, rev. x0 means first silicon = final silicon?

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    Quote Originally Posted by saaya View Post
    only 6 months? there have been leaked samples more than 6 months before the launches in the past... and isnt bulldozer supposed to launch in early 2011 if not end of this year? in that case EVT would have started recently or would be well under way...
    We have said 2011, not early 2011. I have to be very careful with my words because I cannot indicate when in 2011 the product will launch.

    EVT is 6 months prior to launch, generally speaking. I can't get into any other product team's schedules, but for servers it is 6 months. If EVT started we would be launching in Q3 2010, and that is NOT the case.

    A wafer generally takes ~13 weeks from start to finish. Once you receive parts they go through several steps that I will not reveal, then they land in our labs. We do some things to them from a test/qual perspective, and then, when they pass a certain % of qualification they are deemed EVT and sent on to our major partners.

    The challenge here is that I have to be careful about what I say. People start doing the math to figure out where we are in the cycle. I am guessing that the original comment was started in that manner. Someone was hoping I would say they were wrong and indicate WHY they could not have samples. With an understanding of the process one could figure out where we are. Which is why I have stuck to "can't be true" and have not said any more.
    While I work for AMD, my posts are my own opinions.

    http://blogs.amd.com/work/author/jfruehe/

  3. #378
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    Quote Originally Posted by qcmadness View Post
    So, rev. x0 means first silicon = final silicon?
    Not necessarily. There are major and minor steppings and sub steppings below that.

    Istanbul is D0, for instance, but Shanghai was C3 if I remember correctly. Sometimes you launch with x1 and do a stepping to x2 in midlife. You can't tell final silicon based on the revs.
    While I work for AMD, my posts are my own opinions.

    http://blogs.amd.com/work/author/jfruehe/

  4. #379
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    Quote Originally Posted by JF-AMD View Post
    We have said 2011, not early 2011. I have to be very careful with my words because I cannot indicate when in 2011 the product will launch.

    EVT is 6 months prior to launch, generally speaking. I can't get into any other product team's schedules, but for servers it is 6 months. If EVT started we would be launching in Q3 2010, and that is NOT the case.

    A wafer generally takes ~13 weeks from start to finish. Once you receive parts they go through several steps that I will not reveal, then they land in our labs. We do some things to them from a test/qual perspective, and then, when they pass a certain % of qualification they are deemed EVT and sent on to our major partners.

    The challenge here is that I have to be careful about what I say. People start doing the math to figure out where we are in the cycle. I am guessing that the original comment was started in that manner. Someone was hoping I would say they were wrong and indicate WHY they could not have samples. With an understanding of the process one could figure out where we are. Which is why I have stuck to "can't be true" and have not said any more.
    Is bulldozer ahead of your internal schedule?

  5. #380
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    Quote Originally Posted by JF-AMD View Post
    Not necessarily. There are major and minor steppings and sub steppings below that.

    Istanbul is D0, for instance, but Shanghai was C3 if I remember correctly. Sometimes you launch with x1 and do a stepping to x2 in midlife. You can't tell final silicon based on the revs.
    Shanghai has C2. Deneb has both C2 and C3.

  6. #381
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    Quote Originally Posted by JF-AMD View Post
    The issue is that if we were going to "leak" parts out, it would actually be my call as the director of marketing. And I can tell you that I wouldn't approve that. Especially early Bulldozer silicon. Trust me, the first rev is always pretty rough relative to the final (except Istanbul where first silicon was final silicon.)
    IMHO there are pro/cons for both approach. No doubt non-leaking is better 'cos it's safe bet.
    But There's always probability of repeating the SledgeHammer scenario with EVT (or was it ES) that was published on Xbit labs!
    Result of that leakage was really steamed off and lowered expectations towards the K8!
    But when final SKU has hit the market and the media, everyone was blown out!
    Don't believe it was planned, but it did turned out great.
    Again that doesn't necessarily mean it is easily repeatable, and controllable... so no-leaking is always better way.

    On the Istanbul - yeah brilliant part and execution! I don't recall any other "0" revision that has gone in sales like Istanbul's D0
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    Quote Originally Posted by qcmadness View Post
    HT Assist, as I recalled somewhere, can be turned on or off by BIOS.
    So no big deal.

    Using different mask will be a huge waste.
    Even Intel does the same thing (server / mobile / desktop - 1 mask for all).
    Yes it can be turned off in BIOS, but by not laying out the circuitry and reducing the paths, what if you can get to higher clocks?

    There is enough variance that I know you can't take a lisbon and make it a thuban, and vice versa. That is all I can say.
    While I work for AMD, my posts are my own opinions.

    http://blogs.amd.com/work/author/jfruehe/

  8. #383
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    Quote Originally Posted by qcmadness View Post
    Is bulldozer ahead of your internal schedule?
    I would never comment on that. It we were ahead of schedule I would need to have PR, the lawyers and everyone else give me the clearance. Comments like that can impact the stock price, and I don't look good in stripes, they make me look fat.
    While I work for AMD, my posts are my own opinions.

    http://blogs.amd.com/work/author/jfruehe/

  9. #384
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    C32 socket

    Quote Originally Posted by JF-AMD View Post
    Not necessarily. There are major and minor steppings and sub steppings below that.

    Istanbul is D0, for instance, but Shanghai was C3 if I remember correctly. Sometimes you launch with x1 and do a stepping to x2 in midlife. You can't tell final silicon based on the revs.
    JF-AMD,

    Is their an official date yet for the release of the C32 socket? I am hoping to see some reasonably priced dual socket motherboards for desktop workstations (engineering simulations, cad, etc)

    Thanks
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    Quote Originally Posted by Nedjo View Post
    IMHO there are pro/cons for both approach. No doubt non-leaking is better 'cos it's safe bet.
    But There's always probability of repeating the SledgeHammer scenario with EVT (or was it ES) that was published on Xbit labs!
    Result of that leakage was really steamed off and lowered expectations towards the K8!
    But when final SKU has hit the market and the media, everyone was blown out!
    Don't believe it was planned, but it did turned out great.
    Again that doesn't necessarily mean it is easily repeatable, and controllable... so no-leaking is always better way.

    On the Istanbul - yeah brilliant part and execution! I don't recall any other "0" revision that has gone in sales like Istanbul's D0
    Leaks are a double edged sword. My personal preferece is not to do them, so generally speaking, if you see Opteron on the streets before launch, it's really good odds that I am sitting in my cube steaming about it and not happy. Or on a damn plane, which is probably more likely
    While I work for AMD, my posts are my own opinions.

    http://blogs.amd.com/work/author/jfruehe/

  11. #386
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    Quote Originally Posted by trueblue View Post
    JF-AMD,

    Is their an official date yet for the release of the C32 socket? I am hoping to see some reasonably priced dual socket motherboards for desktop workstations (engineering simulations, cad, etc)

    Thanks
    We wil be launching in Q2. We don't release actual dates.
    While I work for AMD, my posts are my own opinions.

    http://blogs.amd.com/work/author/jfruehe/

  12. #387
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    Amazing posts on the subject JF-AMD! You explained it very well how stuff works in some parts of your business

  13. #388
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    Quote Originally Posted by Nedjo View Post
    IMHO there are pro/cons for both approach. No doubt non-leaking is better 'cos it's safe bet.
    But There's always probability of repeating the SledgeHammer scenario with EVT (or was it ES) that was published on Xbit labs!
    Result of that leakage was really steamed off and lowered expectations towards the K8!
    But when final SKU has hit the market and the media, everyone was blown out!
    Don't believe it was planned, but it did turned out great.
    Again that doesn't necessarily mean it is easily repeatable, and controllable... so no-leaking is always better way.

    On the Istanbul - yeah brilliant part and execution! I don't recall any other "0" revision that has gone in sales like Istanbul's D0
    We have got another rev. x0. It is also a D0, Winchester.

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    Quote Originally Posted by trueblue View Post
    JF-AMD,

    Is their an official date yet for the release of the C32 socket? I am hoping to see some reasonably priced dual socket motherboards for desktop workstations (engineering simulations, cad, etc)

    Thanks
    C32 definitely deserves more spotlight (or at least photo sessions that G34 had )

    IMHO push for bringing C32 on desktop/workstation market would be of great help for "sweet-spot" strategy on the server market. Making necessary steps in that direction would ultimately bring down BOM of C32 mobos making them choice for server and desktop markets...
    that's page from LGA1366 book worth copying

    Well that's just wishing now, and the best we can hope for is that mobo makers will build affordable ATX mobos for C32 Opterons... but we can always hope that Zambezi will be C32 compliant
    Quote Originally Posted by JF-AMD View Post
    Leaks are a double edged sword. My personal preferece is not to do them, so generally speaking, if you see Opteron on the streets before launch, it's really good odds that I am sitting in my cube steaming about it and not happy. Or on a damn plane, which is probably more likely
    like this e-bay thing with MC? Well that haven't gone down the south so badly!? It was quite interesting from this side of screen, but I can imagine how was it from cube/plane perspective!
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    Quote Originally Posted by qcmadness View Post
    We have got another rev. x0. It is also a D0, Winchester.
    Actually, all final silicon should be to the same grade, so whether you get it right the first time, or 3 spins later, the end product should be the same.

    And, fyi, with each spin the engineers usually figure out how to tweak slightly more performance or make something slightly better. In that instance, having first rev go to market could be seen as a negative by some.
    While I work for AMD, my posts are my own opinions.

    http://blogs.amd.com/work/author/jfruehe/

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    wow...16 pages is a lot!
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    Quote Originally Posted by god_43 View Post
    wow...16 pages is a lot!
    waiting for w0mbat's reply....
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  18. #393
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    Quote Originally Posted by god_43 View Post
    wow...16 pages is a lot!
    16 pages. 16 cores.

    I would categorize it as "just enough"
    While I work for AMD, my posts are my own opinions.

    http://blogs.amd.com/work/author/jfruehe/

  19. #394
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    Quote Originally Posted by JF-AMD View Post
    16 pages. 16 cores.

    I would categorize it as "just enough"
    Perhaps 20-years from now this will be quoted like Bill Gates "640K ought to be enough for anybody." when we have 1000+ cores?

    This is very intresting thread.

  20. #395
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    Quote Originally Posted by ilkkahy View Post
    Perhaps 20-years from now this will be quoted like Bill Gates "640K ought to be enough for anybody." when we have 1000+ cores?

    This is very intresting thread.

    No one would ever say anything is enough today
    because all have learn from Mr. Gates
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    Quote Originally Posted by qcmadness View Post
    We have got another rev. x0. It is also a D0, Winchester.
    Lame ... seems like you forgot the golden generation:

    K8 C0 aka Sledegehammer

    These were the first Athlon64 (K8 Opteron launched earlier with B3).

    Concerning Orochi's release ... I would not hold my breath. Doing some "math" by comparing it to old schedules is not suitable, either. It is a brand new architecture, thus it is very likely that the engineers has to debug more than the usual stuff after a shrink or a new x-core K10 Design.

    Anybody who remebers the K8 release ? Back than AMD needed ~2 years from first silicon to launch. Actually that would be the best comparison.

    Anyways, the time from tape-out / first silicon to time-to-market will be longer in any case, as one or two more spins could be necessary.

    Furthermore I guess AMD learned from last time that it is not good to rush e.g. a B2 design to the market (hint: TLB ...)

    Historically seen, we should wait for Orochi C0/C1, that was IMO so far always the first usable (for desktop OCers and performance freaks) silicon.

    Ax is first silicon with logical & performance bugs, Bx has still some performance bugs (hopefully all important logic bugs are solved..) and just with Cx everything is (more or less) ironed out.

    Quote Originally Posted by qcmadness View Post
    Using different mask will be a huge waste.
    Even Intel does the same thing (server / mobile / desktop - 1 mask for all).
    No - it depends on the market volume.
    If we are talking high-volume, then an extra mask pays off.

    That's why Intel had dedicated C2D masks for dies with 3MB L2, instead of 6MB, and why AMD had back in the days dedicated K8 Newcastle mask with only one Hypertransport link instead of three and 512kB L2 instead of 1 MB.

    Nowadays AMD also has the cache-less K10 Propus die for the high-volume market.

    However, I do not think that Thuban is considered to be high-volume, too. Thus I also believe that it has to be the same die as Valencia's with the server stuff fused off. But let's wait and see ...

    cheers

    O.
    Last edited by Opteron146; 02-21-2010 at 12:57 AM.

  22. #397
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    Quote Originally Posted by JF-AMD View Post
    if we were going to "leak" parts out, it would actually be my call as the director of marketing.
    i think you overestimate your control over that matter
    or your talking about a controlled leak...

    Quote Originally Posted by JF-AMD View Post
    Yes it can be turned off in BIOS, but by not laying out the circuitry and reducing the paths, what if you can get to higher clocks?

    There is enough variance that I know you can't take a lisbon and make it a thuban, and vice versa. That is all I can say.
    different package i guess...

  23. #398
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    Quote Originally Posted by saaya View Post
    i think you overestimate your control over that matter
    or your talking about a controlled leak...
    There are 2 types of leaks, controlled and uncontrolled. At this phase of the process, any leak would have to be a controlled leak. I would own that decision and my decision would always be no. I generally do not see the value because the silicon is nowhere near final. Enterprise customers make decisions on final silicon.

    Once you get to EVT there is a risk of uncontrolled leak, and when you get to DVT that risk increases even more. Those I have no control over, but those phases are still a ways away.
    While I work for AMD, my posts are my own opinions.

    http://blogs.amd.com/work/author/jfruehe/

  24. #399
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    I do enjoy AMD's "civil construction tool" processor cores so far..

    Hopefully Bulldozer will live up to what Sledgehammer & Clawhammer achieved.
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    1. its not outside amd
    2. im not marketing
    3. even the idea that i could get a cam near the system to make any pics is crazy, yet ss...
    4. opposing to JF, i heard that bd samples are not like yetis these days. but hes right that everything bd is 2011 for amd
    (well, mc was not q1 2010 too so i dont know if they are ahead of schedule or not)

    and from now on i wont comment on this again cause i feel a certain string around my neck, dresdenboy just told me to stop doing it too and i always value his comments. so blame him if u want too ;-)

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