Hmm, looks like the system is stable in MemScope but Linx throws me an error.
BTW: Loaline Calibration boosts up only CPU voltage, right?
Hmm, looks like the system is stable in MemScope but Linx throws me an error.
BTW: Loaline Calibration boosts up only CPU voltage, right?
Last edited by kuebk; 05-01-2009 at 02:19 PM.
e8500 @ 8x500 1.275v // true // rampage formula // 2x hr-05 sli/ifx // ballistix tracer 1066@1200 cl5 2.14v // en8800gt // hr-03 gt // 2x wd2500aaks // dp p7 550w // g5+g7 // e2201w-1 // p183 + 6x s-flex
mems: vitesta ee+ 800@1200 cl5 2.4v
LLC locks Vin = Vout for Vcc/Vtt at voltage regulator. So you don't get droop, it compensates for drop across the reg and traces, and boosts voltage between in and out. Thats all it does really.
IF llc gives you problems, you have a PSU which can't handle the extra stress, or a voltage reg on your board that can't handle it.
Linpack errors are usually GTL / DRAM clock skew related. Under heavy load that Linpack creates you experience greater clock shift, and jitter and if it is too much shift / jitter it'll be visible in Linpack.
DFI LT-X48-T2R UT CDC24 Bios | Q9550 E0 | G.Skill DDR2-1066 PK 2x2GB |
Geforce GTX 280 729/1566/2698 | Corsair HX1000 | Stacker 832 | Dell 3008WFP
Ok, thanks.
My current settings are:
FSB = 450
Strap = 400
MEM = 1200
A/B Skew = Auto
Timings = 5-5-5-15
tRFC = 60
Performance Level = 7
A/B Pull-ins = all disabled
vCPU = 1.375
vMCH = 1.45
vDDR = 2.4
Loadline Calibration = Enabled
Both Spectrums = Disabled
And I left my PC for overnight with Linx ran, got up few hours later to check how's Linx is doing and it got stuck at 47 loop out of 100 with some error, so I went back sleep without turning it off but when I got up few minutes later I saw BSOD on my LCD.
47 passes looks pretty good for me but I don't really know what I can adjust, should I mess with DREF? Or maybe with Skews?
I dunno why my PC god BSOD overnight in idle, yea you can say it was because LLC enabled, but till I started clocing my ram at 600 I was clocking it at 540 with LLC enabled and never got any random BSODs.![]()
Last edited by kuebk; 05-02-2009 at 01:07 AM.
e8500 @ 8x500 1.275v // true // rampage formula // 2x hr-05 sli/ifx // ballistix tracer 1066@1200 cl5 2.14v // en8800gt // hr-03 gt // 2x wd2500aaks // dp p7 550w // g5+g7 // e2201w-1 // p183 + 6x s-flex
mems: vitesta ee+ 800@1200 cl5 2.4v
Your in the right strap and your running at right DDR speed to start experiencing random failures.
Try with Prime95 Blend mode and look where it fails. Is it always in small FFT's or is it in Large FFT's. Is it always the same core. Or is it just randomly like I have at 8 X 465MHz and DDR 1239MHz.
Did you use the CPU and NB Clock Skew?
Haven't tried to use CPU/NB Skews, same as I haven't with NB GTL and tREF.
About CPU - it's not its fault for 100%.
I've used to run my rig on [IP35-PRO]:
FSB = 450
MEM = 540
vCPU = 1.375
vDDR = 2.2
Timings = 5-5-5-15
And on Rampage Formula I added
LLC = Enabled
A/B Skews = Advance +300
All other settings on stock/default/auto settings and haven't got any stability problem back before when I was using IP35-PRO and now when I'm using Rampage Formula.
IMO the problem is with my RAM, I'm not sure can it be clocked so high.
Anyway I'm kinda curious why my mobo can run ram at 540 on stock vMCH but to get 600 I need to raise it by 0.2v.![]()
Last edited by kuebk; 05-02-2009 at 06:39 AM.
e8500 @ 8x500 1.275v // true // rampage formula // 2x hr-05 sli/ifx // ballistix tracer 1066@1200 cl5 2.14v // en8800gt // hr-03 gt // 2x wd2500aaks // dp p7 550w // g5+g7 // e2201w-1 // p183 + 6x s-flex
mems: vitesta ee+ 800@1200 cl5 2.4v
I use CPU Clock Skew Delay 200ps and NB Clock Skew Delay 100ps. This lets me run stable with 1.33V for North Bridge Voltage in the BIOS. Without these delays it isn't possible for me to get it stable with that low voltage. Maybe with my Quad it would be impossible to have that stable without the delays.
DRAM CLK on Channel A/B is on Auto.
@mikeyakame
Do you know if you leave the CPU and NB Clock Skew on Auto that they automatically change when you use higher or lower FSB?
e8500 @ 8x500 1.275v // true // rampage formula // 2x hr-05 sli/ifx // ballistix tracer 1066@1200 cl5 2.14v // en8800gt // hr-03 gt // 2x wd2500aaks // dp p7 550w // g5+g7 // e2201w-1 // p183 + 6x s-flex
mems: vitesta ee+ 800@1200 cl5 2.4v
Gah XS timed out and lost my huge post. I'm not going to write it all again.
Basically as you increase DDR frequency MCH load increases, and voltage jitter limits decrease at the same time, so increasing Vddr to 2.4v lets say to get 1200mhz while using 1.55v Vmch to run 475mhz fsb at PL6 and 1.40v Vcc to run 4.2ghz, you might push the Vreg electronics to the point where 95% of the circuit operates correctly at say 90c, but 5% of the electronics can't guarantee the same consistent operational behaviour as the other 95%, this appears as instability, inconsistenly and errors.
Lets say 100% of the circuit meets operational specs at 85c with 90% output of its maximum, but your circuit is operating below 85c at 95% capacity at 75% output load, but once the output load increases past 75%, Vreg circuitry temps begin to shoot upto 95c in some areas and it just happens these areas also contain say 5% of electronic components which fail to meet operational specs at 95c and > 75% output, but the other 95% don't show any signs of faltering. You might pick up 1-2% of loss from the rest of the components over compensating, but you still have 3% which can not be compensated by the rest of the components working at their limits.
Nothing is perfect, and you need to sacrifice voltages sometimes to guarantee stability for the rest, Vddr then Vmch are usually the first ones that need slight reductions, if this means you lose some headroom and performance you have no choice, as the gains from PL/DDR frequency are much smaller than FSB/CPU frequency, and more important Vtt/Vcc filtering circuitry are designed to be much more robust and more importantly be broad enough to cope with scenarios that may occur only in 0.0001% of operation, but are bad enough to throw a stable system into a BSOD or corruption. It's more likely that CPU voltage is going to be increased rather than DDR, and GTL+ bus design is more sensitive to this kind of random occurance than DDR bus is.
Last edited by mikeyakame; 05-03-2009 at 12:41 AM.
DFI LT-X48-T2R UT CDC24 Bios | Q9550 E0 | G.Skill DDR2-1066 PK 2x2GB |
Geforce GTX 280 729/1566/2698 | Corsair HX1000 | Stacker 832 | Dell 3008WFP
Bookmarks