Asus crippled ICH10 performance on their X58 boards.

[Chosen.]

ICH9/10 have 6 PCI-E v1.1 lanes for shared onbard device bus' and low bandwidth PCIE v1.1 slots, ie 1x or 4x.

You should also note when you overclock the system on the Host Bus side, you'll improve data going out (read burst) due to additional Host Bus bandwidth and cycles but on the other hand you are also creating a queue on the data coming in because Host Bus can push more data faster than DMI bus bandwidth is there. Raising PCIE frequency helps stabilize the spikes in IO reads, and improves IO write bandwidth because DMI clock is generated by clock generator PCIE dividers. Raising PCIE frequency beyond design can introduce signal integrity degradation from unshielded external EMI or cross chatter from selecting a similar reference frequency to a vendors own unique reference frequency, and then all hell breaks loose on your system

X38/X48/X58 have 36 PCIE v2.0 lanes. 32 lanes for PCIE slot allocation. 4 lanes for DMI (direct media interface, which is a dedicated two way point to point link on PCIE v2.0 4x bus) interconnect host link between PCH (x58) / MCH (x38/48) and IOH (ICHx).

P35/P45/etc have 20 PCIE v2.0 lanes. 16 for PCIE slot, 4 lanes for DMI.

ICH has always been on DMI, which behaves similarly to PCI while at the same time behaving like PCIE with VC (virtual channels) layer for QoS and transaction scheduling / interleaving for all IOH root bridge outgoing transactions with TAD (target address decode) destination beyond IOH scope or incoming bus transactions from MCH with TAD lying inside IOH.

Very interesting information, I have spent the last 48 hours trying to figure out how things work inside my motherboard.
Not because I have to (somebody who spends $300 for a new motherboard expects steps forwards, not backwards), but because I spend my time in my pc more than just playing games.

ICH is given priority on DMI VC's and allowed to request priority transactions for dedicated 1-2 PCIE lanes. 300MB/sec is probably just the amount of DMI transaction bandwidth the ICH is limited to, because there are important LPC and SMBUS devices also living on the IOH and lest we forget all the routing management, strobe requests, priority transactions, and so on.

I don't know about this, I have seen higher transfer rates on the ICH family, like for example the half Gb/sec that a pair of X25-E's can achieve:


Also, through practice, it has been found that the actual (practical) cap of the ICH10 is ~660Mb/sec, as stated earlier in the thread. For example, three X25-M's that could in theory perform 3*250Mb/sec=750Mb/sec, are capped at:

Both your lack of understanding and failure to take the time to go to Intels website and find the ICH datasheet for your model to get a better idea of "how Asus is screwing you over", you might have realized that Asus while many things still has to stick to Intel specifications for board chipset mechanical and electrical design, and on top of that you might have saved the Internet from the wild fires that you started in PC news gossip columns.

A) And who told you that I haven't been in the Intel site researching? Hence my question earlier, on "how much does a motherboard manufacturer have to stick to the reference design of the chipset manufacturer?".
B) I couldn't care less about Asus' reputation at this point. If this was the subject of my thesis, I would be sending polite emails to Asus and I would be patiently awaiting for their feedback. However, there is a $300-thin line between "asking" and "demanding/being entitled to".
I had problems with Asus motherboards in the past, and all I did was to send an email to their product support team and wait forever for a dry answer like "We don't support RAID controllers on the PCI-E x16 slots" and the solution so far was always simple yet expensive: get rid of it and buy/try a new board.

Wild claims cost companies lost business, they lose enough they'll sick their lawyers on you to seek damages.

And bad products cost consumers lost money, what is your point? That I should shut up and don't dare accuse the mega-company for a product with a major flaw? This is not how it works mate.
The root-cause behind this performance degradation is unknown to me, and I am making assumptions based on all the information that I come across; the performance degradation of the "new and improved" product though, is a fact whether they (Asus) like it or not (I certainly don't).

Back on the subject now, I will assume that your criticism had good intentions and you were not just trying to contrast your expertise against my very basic knowledge on the subject, but the fact remains that in theory it all works lovely and in an identical way between the P45's and the X58's implementations of the ICH10, but in practice there is a performance drop between 40% (transfer rates) and 500% (small reads/writes) and I think that all involved stakeholders should be aware of it, both Asus and the consumers who spend their money hoping on an "upgrade".
Any objections on that?