I spent some time the other day messing around with OCing this board with my q9650. I got it stable at 445 x 9 before running out of time to try all of the settings myself, so does anyone have any advice on what to change to get this higher? I've tried just upping the CPU/vtt/vNB volts along with the FSB but couldn't get it stable for more than an hour of prime95.

The rig is watercooled, temps are great (except for the NB getting to 50C under load but that needs a remount with MX-2 on the block), RAM is 4 x 2GB sticks of G.Skill 8500CL5D-4GBPK. RAM volts are probably a little higher than needed, but it's within specs and they're well cooled so I'm not worried about the volts for now


Code:
Processor:  Q9650
Ai Overclock Tuner: Manual
Ratio CMOS Setting: 9
FSB Frequency: 445
CPU Clock Skew: Normal
NB Clock Skew: Normal
FSB Strap to North Bridge:  333MHz
DRAM Frequency: 1069MHz

DRAM CLK Skew on Channel A1: 
DRAM CLK Skew on Channel A2: 
DRAM CLK Skew on Channel B1: 
DRAM CLK Skew on Channel B2: 
DRAM Timing Control: Manual

1st Information: 5-5-5-15-3-52-6-3

CAS# Latency: 5 DRAM Clocks
DRAM RAS# to CAS# Delay: 5 DRAM Clocks
DRAM RAS# Precharge: 5 DRAM Clocks
DRAM RAS# Activate to Precharge: 15 DRAM Clocks
RAS# to RAS# Delay:  3
Row Refresh Recycle Time: 50 DRAM Clocks
Write Recovery Time: 6
Read to Precharge Time: 3

2nd Information: 7-3-5-4-5-4-6

Read to Write Delay (S/D): 8
Write to Read Delay (S):  3
Write to Read Delay (D):  5
Read to Read Delay (S):  4
Read to Read Delay (D):  6
Write to Write Delay (S): 4
Write to Write Delay (D): 6

3rd Information: 14-5-1-6-6

Write to PRE Delay: 14
Read to PRE Delay: 5
PRE to PRE Delay: 1
All PRE to ACT Delay: 6
All PRE to REF Delay: 6
DRAM Static Read Control: Disabled
DRAM Read Training: Disabled
MEM. OC Charger: Auto
Ai Clock Twister: Auto
Ai Transaction Booster: Manual

Common Performance Level: 12
Pull-in of CHA PH1: Disabled
Pull-in of CHA PH2: Disabled
Pull-in of CHA PH3: Disabled
Pull-in of CHB PH1: Disabled
Pull-in of CHB PH2: Disabled
Pull-in of CHB PH3: Disabled

PCIE Frequency: 100

CPU Voltage: 1.31250
CPU PLL Voltage: 1.50000
FSB Termination Voltage: 1.28550
DRAM Voltage: 2.10475
North Bridge Voltage:  1.28550
South Bridge 1.5 Voltage:  1.50000
South Bridge 1.1 Voltage: 1.10000: 

CPU GTL Reference (0): +20mV
CPU GTL Reference (1): -20mV
CPU GTL Reference (2): +20mV
CPU GTL Reference (3): -20mV
NB GTL Reference:  +20mV
DDR2 ChA Reference Voltage: Auto
DDR2 ChB Reference Voltage: Auto
North Bridge DDR Reference: Auto

CPU Configuration:

Ratio CMOS Setting: 9
C1E Support: Disabled
Max CPUID Value Limit: Disabled
Intel Virtualization Tech: Enabled
CPU TM Function: Enabled
Execute Disable Bit: Enabled 

Load-Line Calibration: Enabled
CPU Spread Spectrum: Disabled
PCIE Spread Spectrum: Disabled