Quote Originally Posted by ci2kla View Post
Just bought an RE to play~ mind if I join in this discussion to contribute
Yesterday got some test. Settings as below (briefly)
FSB: 540
Multiplier: 8
divider: 200/667

Voltages:
CPU: 1.35v
CPU VTT: 1.19v
CPU PLL: 1.55v
vDIMM: 2v @ 7-6-5-18
vNB: 1.51v
GTLs:
CPU 0/2: +50mv
CPU 1/3: +10mv
NB: +40mv
1.5v SB: 1.55v

Others on auto

With this strap I was able to boot at tRD = 8 and Pass dual PI 32M
With 1.41v vNB I got BSOD right before I saw the desktop
With 333/1066 divider the machine was bootable but BSOD when loading Windows using tRD = 8

What's interesting is, compare with the anaxxtech's review (Rampage Formula)
It has a formula about the calculation if the machine will be able to POST or not using a certain tRD.
While 333/1066 divider's value is bigger then 200/667 in terms of theory we should be able to boot up and load to windows without a problem using the same tRD value.
The problem is, with 333/1066 divider tRD @ 8 is completely unstable while 200/667 can boot up and pass dual 32M, even memset to tRD = 7 for a memory benchmark (possible to pass PI as well, haven't tried)
Any suggestions and comments on that?

And, I have a problem on overclocking my CPU to 4.5Ghz, will post the problem later. Still looking for assisstance
(Sorry for my bad english)

EDIT: The scene as below
FSB 500 Multi 9 4500Mhz
vCore: 1.3875v 1.392v Load LLC Enabled
With this setting I can pass OCCT for 2 hrs mixed test
But in ORTHOS I wasn't able to Pass even 1 minute and always get the same error: Final Result Mismatch
It does not make a single difference by rising the vCore to 1.425v. However it do pass dueal PI 32M...that's confusing...please help

Hi ci2kla

For predicting 'allowable' POSTs, I've not had much success with the tRD equation either - I found settings that wouldn't actually POST came up as allowable using (my understanding of) the formula.

I came to the conclusion that the fixed values (for FSB range) given in the A/Tech Rampage Formula article, only applied to DDR2 (it's a DDR2 article of course). I think the 'tRD Calculator' at OCZ uses the same values and is for DDR2 only. Can anyone confirm one way or another?

Anyway, I found in tests on the 333 strap and 5:8 divider (333/1066 from your description?), that as a general rule (on my board at least and up to 625FSB), the tRD value must be at least one higher than the CL value for POST to be allowable. eg CL7/tRD8 or higher and CL8/tRD9 or higher are allowable for POST using 5:8 divider.

As a general rule for the 1:2 divider (at least between 450 and 515FSB, and again maybe just on my board ), the tRD value may be one lower than the CL value with POST still allowable. eg CL7/tRD6 or higher and CL8/tRD7 or higher are allowable for POST using 1:2 divider.

At some point below 450FSB - maybe at 400 and below but haven't tested yet - the 1:2 divider appears to allow the tRD value to be two lower than CL value. As cstkl1 showed a few posts back tRD 5 can be used with CL7. I suppose the 1:2/CL7/tRD5 combination is allowed by the lower FSB level.

So far I have found that Pull-ins obey the same 'rules' so, for example, no POST with pull-in to 6 from tRD7 with CL8/1:2 at 450-500FSB.
As rob2k mentioned finding with tRD5, pulling-in to 5 from tRD6 may not be allowed with CL7 either, depending on FSB.

Of course none of this explains the instability you found on the 333 strap but not with the 200 strap, since you were able to POST with CL7/tRD8, as expected.

I haven't tested at all yet on the 200 strap but cstkl1's findings with 1:2 at 400FSB with 4x1GB, using low vNB (1.25V) and CL7/tRD5, look interesting too. I've only gone above 515FSB using 5:8 (333 strap). Will try some 200 strap runs to see what I get in terms of vNB/stability/performance

I've been using Moderate/Strong/Stronger for Clock Twister, trying to offset my lack of decent CL7/1T clocks and that also contributes to my higher vNB requirement.