Quote Originally Posted by mikeyakame View Post
The reason you cant pull in CHB PH3 is because there isn't enough skewing to correct CHB clock phases. You can try adjust CHB CLK skews with a little advance and see if it helps. Be warned if you set tRD phase skewing too tight you will corrupt your CMOS instantaneously, be sure to use OC Profiles to save your settings before you try too tight phase skewing. Try changing your strap also, 266 strap is a bit meh. I use 333 or 400 I find they are better at higher FSBs.

There is also a rule that applies that you must pull in PH1 of either before you are allowed to pull in any other phases or you cause misalignment.
As you suggested i've tried correcting CHB skew, but even with 50 advance i immediately got the cmos corrupted...tried higher advance but worthless always corrupt cmos. si i've tried to delay CHB skew, no more cmos corruption but still hang on det dram and no post.
in the end, with my current settings i'm not able to enable CHB PH3, and while priming with CHA PH3 enabled i've got a bsod...so i've disabled also CHA PH3.
BTW now i can confirm that with a 4:5 multiplier on ram, the PH3 affects memory latency: with CHA PH3 enabled i've reached 50.4 ns, while now with it disabled i've returned to 52.2 while cache L1 and L2 remained at 0.8 and 3.2 in with both cases.