Intel's First Nehalem Cpu-Z Pic.

[largon]

"Core VID"

->
OBVIOUS FAKE

Since this is the first chip from Intel with an Integrated Memory Controller, the cache sizes they have currently arent needed (just look at AMD's current lineup and lack of 6+mb of cache).

Infact, AMD's upcoming 45nm K10 derivate (dubbed Shanghai) will bump the green team's L2 to 6MB...