AMD Zambezi news, info, fans !

[informal]

Summary of FX4110 @ 4.2Ghz vs Phenom II X4 980 @ 3.7Ghz:
super pi :meh I don't want to bother finding results in this "benchmark"
fritz chess: FX4110 gets 7332pts, X4 980 gets 9067pts. FX is 24% slower at stock(vs stock) and 40% slower per "core" at the same clock. Multithreaded benchmark.
3d mark vantage CPU test : FX4110 gets 10660pts, X4 980 gets 12780pts. FX is 20% slower at stock and 36% slower per "core" at the same clock.Multithreaded benchmark.
wprime 32m: FX4110 gets 17.9s, X4 980 gets 11.45s. FX is 56% slower at stock and 77% slower per "core" at the same clock.Multithreaded benchmark.
c11.5 : FX4110 gets 3.42pts, X4 980 gets 4.34pts. FX is 27% slower at stock and 44% slower per "core" at the same clock.Multithreaded benchmark.

I have skipped over 7zip since I can't find comparable benchmarks . Aida cache and memory shows somewhat better memory read/write and L2/L3 cache BW for reads. The rest of cache performance is on par or slower than Deneb.

Conclusion: overall FX4110 is 32% slower than Deneb X4 @ 3.7Ghz stock vs stock and 49% slower when both are at 4.2GHz. Either all these tests are failure of the platform bugs (or something else) or Bulldozer is much slower than Deneb with the same "thread" count. All above tests utilize the "world's first 256bit FPU" and it fails hard versus "old 128bit" Deneb FPU,even in single thread mode... Imagine the OC you have to reach to just match Deneb,it has to be sky high (think 5.5-6Ghz on air to match 4Ghz Deneb). How is AMD going to charge 140$ for this chip is beyond me.

[mAJORD]

Summary of FX4110 @ 4.2Ghz vs Phenom II X4 980 @ 3.7Ghz:
super pi :meh I don't want to bother finding results in this "benchmark"
fritz chess: FX4110 gets 7332pts, X4 980 gets 9067pts. FX is 24% slower at stock(vs stock) and 40% slower per "core" at the same clock. Multithreaded benchmark.
3d mark vantage CPU test : FX4110 gets 10660pts, X4 980 gets 12780pts. FX is 20% slower at stock and 36% slower per "core" at the same clock.Multithreaded benchmark.
wprime 32m: FX4110 gets 17.9s, X4 980 gets 11.45s. FX is 56% slower at stock and 77% slower per "core" at the same clock.Multithreaded benchmark.
c11.5 : FX4110 gets 3.42pts, X4 980 gets 4.34pts. FX is 27% slower at stock and 44% slower per "core" at the same clock.Multithreaded benchmark.

I have skipped over 7zip since I can't find comparable benchmarks . Aida cache and memory shows somewhat better memory read/write and L2/L3 cache BW for reads. The rest of cache performance is on par or slower than Deneb.

Conclusion: overall FX4110 is 32% slower than Deneb X4 @ 3.7Ghz stock vs stock and 49% slower when both are at 4.2GHz. Either all these tests are failure of the platform bugs (or something else) or Bulldozer is much slower than Deneb with the same "thread" count. All above tests utilize the "world's first 256bit FPU" and it fails hard versus "old 128bit" Deneb FPU,even in single thread mode... Imagine the OC you have to reach to just match Deneb,it has to be sky high (think 5.5-6Ghz on air to match 4Ghz Deneb). How is AMD going to charge 140$ for this chip is beyond me.

For the record, and another reference. going back to my Bobcat clock/clock comparisons
Per core K10 is:

Super pi 5% faster
Fritz chess: K10 20% faster
Cinebench 11.5: 49% faster

at the same clk speed.

which means, somehow Bulldozer is about the same performance :S , even on some of these SSE/FPU heavy benches.

Has anyone determined the pipeline length details for Bulldozer? I believe Bobcat is 15 stages vs 12 for K10

It is likely a bit longer to enable these high clockspeeds, but I'm still finding some of the results out of line. I know you didn't look up superpi, but it for one is, according to these results slower than Bobcat (as i've mentioned before), given the architectures seem to be similar, I find this quite odd.

Even if the pipeline stages are longer than Bobcat's the massive amounts of Cache, much larger buffers, much wider more capable performance orientated FPU (Bobcat has a very trimmed down FPU due to its target market) , assumed more aggressive prefteching It certainly doesn't make much sense at this stage.

I can understand similar IPC to Thurban given the higher frequency headroom, and trade-off's to achieve high performance / watt (all valid design decsisions), but these outlier results like Cinebench, Wprime, Fritz, are quite baffling

[informal]

For the record, and another reference. going back to my Bobcat clock/clock comparisons
Per core K10 is:

Super pi 5% faster
Fritz chess: K10 20% faster
Cinebench 11.5: 49% faster

at the same clk speed.

which means, somehow Bulldozer is about the same performance :S , even on some of these SSE/FPU heavy benches.

Has anyone determined the pipeline length details for Bulldozer? I believe Bobcat is 15 stages vs 12 for K10

It is likely a bit longer to enable these high clockspeeds, but I'm still finding some of the results out of line. I know you didn't look up superpi, but it for one is, according to these results slower than Bobcat (as i've mentioned before), given the architectures seem to be similar, I find this quite odd.

Even if the pipeline stages are longer than Bobcat's the massive amounts of Cache, much larger buffers, much wider more capable performance orientated FPU (Bobcat has a very trimmed down FPU due to its target market) , assumed more aggressive prefteching It certainly doesn't make much sense at this stage.

I can understand similar IPC to Thurban given the higher frequency headroom, and trade-off's to achieve high performance / watt (all valid design decsisions), but these outlier results like Cinebench, Wprime, Fritz, are quite baffling

I agree with you. I personally think something went horribly wrong between the Q4 of 2010 and Q2 of 2011 and now instead of a chip which has a thread count of 8 ,whose each "thread" is at least as strong as Thuban's core in MT and at least 10% stronger in ST workloads(both int and fp),we end up with a Bobcat level of performance per core,roughly of course, which can clock really high though ,but which scales poorly (1.7x or 1.8x over single thread). Even little bobcat ens up faster in select few benchmarks (per clock). To release this thing as a successor to relatively successful Phenom II line is very much crazy.
I'm especially baffled by really slow FP unit. Bobcat's FPU looks like to be on a similar perf. level (per "thread") as Bulldozer's. Sounds crazy but it's true. Just forget K10.

That's why I think this is not final performance. Because why would AMD release something that's worse than what they had before? They'd have to be bat sheet insane to do that.

I have no idea to be honest. Maybe they didn't expect to see this from their simulations? This thing was supposed to be a Thuban crushing machine,excelling at MT workloads and being 30-50% faster at the same TDP as per John Taylor. This is the post I wrote on AT forum few days ago:

This video is from March 8 this year. It was shot at Cebit 2011. It features Macci and John Taylor @ AMD. Mr Taylor said @ 2:20 mark that bulldzoer was designed to deliver 30 to 50% more performance within the same TDP envelope and roughly the same die are versus the cpu it replaces. The video is here.

What I want to know now is in which real world or synthetic benchmarks/workloads is Zambezi going to deliver 30-50% more performance than Thuban and with which magic dust is this going to happen? With the latest numbers it barely beats Thuban in highly MT workloads like cinebench(both old 10 and new 11.5) and handbrake. The difference ranges from tiny to 10 or so %. This is 8T vs 6C case,so best case scenario for Bulldozer. Bulldozer even runs at much higher clocks (both stock and Turbo). Where is 30% difference (just forget 50%)? Oh yes,AES and such are just outliers so those are corner cases.

If it was supposedly designed to deliver 30-50% more performance and if Mr Taylor stated this in the context of very parallel workloads (which is legitimate ) then we can say Bulldozer failed since it can't overall outperform Thuban by more than 20%,let alone 30% or now astronomical 50%. In order to achieve this ,the Bulldozer that John Taylor talked about must be the same one from this slide (and no,this slide was not fake). What happened in the meantime ? How from this 30-50% throughput machine we ended up with barely faster than Thuban? Unless the Bulldozer John Taylor spoke about in the video was expected to run at 4.5-5Ghz stock clock and Turbo to 5.5Ghz ,all within 125W TDP envelope,then something else went wrong and now we get "this" (slower than Thuban at the same clock by 5-15%,depending on the app and barely beating it since it has weaker core scaling and only 1.33x more cores to make up the difference).

[Apokalipse]

I have no idea to be honest. Maybe they didn't expect to see this from their simulations?

Let's say it did fail to meet expectations and actually is worse than K10.5, it would make no sense at all to actually release it. AMD would cancel the release and work on getting something out that actually is better.

The fact that they are releasing it means it will be better than K10.5. Either that or the management have no sense of reality at all.
Without benchmarks, we won't know how much faster than K10.5 it is, or whether it beats SB in IPC and/or single threaded performance; all we can know is it will be faster than K10.5.

If not, then the entire management at AMD should be given a visit by the nice men in white coats.

[informal]

Let's say it did fail to meet expectations and actually is worse than K10.5, it would make no sense at all to actually release it. AMD would cancel the release and work on getting something out that actually is better.

The fact that they are releasing it means it will be better than K10.5. Either that or the management have no sense of reality at all.
Without benchmarks, we won't know how much faster than K10.5 it is, or whether it beats SB in IPC and/or single threaded performance; all we can know is it will be faster than K10.5.

If not, then the entire management at AMD should be given a visit by the nice men in white coats.

In well MTed applications it will be faster than X6 1100T,but this will happen only with 8150 running 3.6Ghz+ Turbo. It will be faster by some 5 to 20% max . In ST workloads or poorly threaded ones(1-4 threads),even with it's max. Turbo it won't beat Thuban ( at 3.7Ghz which is max Turbo for it).

[Apokalipse]

In well MTed applications it will be faster than X6 1100T,but this will happen only with 8150 running 3.6Ghz+ Turbo. It will be faster by some 5 to 20% max . In ST workloads or poorly threaded ones(1-4 threads),even with it's max. Turbo it won't beat Thuban ( at 3.7Ghz which is max Turbo for it).

I think you put far too much stock in the idea of leaked performance being an accurate representation of retail.

[Oese]

I think you put far too much stock in the idea of leaked performance being an accurate representation of retail.

thing is, ALL leaks look like this. Also what leeghoofd indicates.. or he is following the nda in a way that says explizitly "post fake sub-par performance numbers (that are included in the kit, originally taken from a formerly famous, legid reviewer, that was now paid by AMD to loose all his reputation and now is AMD's no.1 paid fud spreader) to let all ppl think bd is flawed and then post real results on launch day claiming u got a bios update on last day before launch"

[MaddMutt]

Let's say it did fail to meet expectations and actually is worse than K10.5, it would make no sense at all to actually release it. AMD would cancel the release and work on getting something out that actually is better.

The fact that they are releasing it means it will be better than K10.5. Either that or the management have no sense of reality at all.
Without benchmarks, we won't know how much faster than K10.5 it is, or whether it beats SB in IPC and/or single threaded performance; all we can know is it will be faster than K10.5.

If not, then the entire management at AMD should be given a visit by the nice men in white coats.

Are you implying that there might still be a revision out there??????

From earlier post's on here, it was implied that Bulldozer is final with stepping B2 and they received it on the 5th of this month??????

Both JF and Movieman have stated that the early ES samples had problems and that WE would see the REAL PERFORMANCE when it was finished and shipped.

I don't think CHEW ( also posted on here) who set a World Record with the BD (WTG), would have told us that the ES samples were bad and don't believe the bad numbers from them.

Some of you Xtreme Members might have the shipping BD ver in hand and running the Benchmarks right now!!!!!!!

This is all speculation as the NDA will probably not be lifted until BD is on store shelves

[Apokalipse]

Are you implying that there might still be a revision out there??????

microcode is contained in BIOS. All AMD would have to do is release a new AGESA version and let manufacturers put it in a new BIOS.

This is all speculation as the NDA will probably not be lifted until BD is on store shelves

We have some information, but exact performance is speculation.

I'd say we can expect them to be faster than K10.5; I don't know if we can make any more expectations than that though.
It could have faster single threaded performance than SB, or it could be slower. I would guess it would be about in the ballpark; but I don't really know.

[MaddMutt]

microcode is contained in BIOS. All AMD would have to do is release a new AGESA version and let manufacturers put it in a new BIOS.

Thank you for the correction.


I was hoping that there was some other reason for the bad numbers

If AMD thinks they can get better numbers with higher speed Is this not what Intel tried to do with the P4/Netburst??????

[dess]

Conclusion: overall FX4110 is 32% slower than Deneb X4 @ 3.7Ghz stock vs stock and 49% slower when both are at 4.2GHz. Either all these tests are failure of the platform bugs (or something else) or Bulldozer is much slower than Deneb with the same "thread" count. All above tests utilize the "world's first 256bit FPU" and it fails hard versus "old 128bit" Deneb FPU,even in single thread mode... Imagine the OC you have to reach to just match Deneb,it has to be sky high (think 5.5-6Ghz on air to match 4Ghz Deneb). How is AMD going to charge 140$ for this chip is beyond me.

There are some possibilities...
1. They've gone totally nuts.
2. They think people are nuts.
3. They know something we don't...

It could be something simple like new microcode enabling certain features, we'll have to wait and see.

Absolutly possible. But...

In any case, I don't think AMD wants to spread FUD about bad performance. They want it to be unknown, to keep Intel in the dark.

Right, they've kept Intel (and the rest of the world) in the dark for quite some time. But, just why they hold on until the very last day before launch? What depends on a few days?

To me, it looks like the engineers desperately trying to find a solution (in microcode) for some quirk that now hinders performance, but in the meantime the management has lost patience and said just let it go.

Or...

If it was supposedly designed to deliver 30-50% more performance and if Mr Taylor stated this in the context of very parallel workloads (which is legitimate ) then we can say Bulldozer failed since it can't overall outperform Thuban by more than 20%,let alone 30% or now astronomical 50%. In order to achieve this ,the Bulldozer that John Taylor talked about must be the same one from this slide (and no,this slide was not fake). What happened in the meantime ? How from this 30-50% throughput machine we ended up with barely faster than Thuban?

Well, perhaps what is called a "reality check"... You know, AMD is not a single person, but a firm with many people. What if some people deceived some other people in-house...? But then, the moment of the truth has came, when it was about to test or present the actual chip... Then "heads were falling", most notably Dirk Meyer's.

[Oese]

Well, perhaps what is called a "reality check"... You know, AMD is not a single person, but a firm with many people. What if some people deceived some other people in-house...? But then, the moment of the truth has came, when it was about to test or present the actual chip... Then "heads were falling", most notably Dirk Meyer's.

nightmare, but not unlikely

@madd: they needed to do both same time. Originally, bd was supposed to come on a mature 45nm process. But i think it wasnt ready and too slow maybe.. So now tick and tock same time^^

[Opteron146]

@madd: they needed to do both same time. Originally, bd was supposed to come on a mature 45nm process. But i think it wasnt ready and too slow maybe.. So now tick and tock same time^^

Yes, and both, GF's process and the processor are f***ed up. That's why you should not do that, it doubles your risks ...
Well, to be fair, so far we only know about the process, a few day are left, just then we know 100% about the processor, too.

Also funny, the next step is probably neither a tick nor a tock. After BDv1@32nm there will be BDv1b@32nm. Well, officially it is called BDv2, however, there is obviously the possibility that BDv2 might just be a bug-fixed BDv1, hence BDv1b. In the last days/weeks I learned to always think about the worst case *g*

Short: To me, the appropriate comparison is not intel, it is nvidia. They got equally f***ed with Fermi and TSMC's 40nm process problems. Nowadays, GTX500 aka GTX400_1b runs nice. Let's hope that it will be the same for AMD and BDv1b ;-)

[tifosi]

...and the processor are f***ed up. ...

Seriously, do you work for AMD? Do you have access to the benches under NDA yet? I believe the answer to both my questions is negative, just like you.

If you have some information please do share, if not, i don't see a need to spread fud.

Oh yes, BD was indeed supposed to come out on 45nm. Till they found out that it will be too hot. Their design targets include certain clock, which wouldn't have been possible within a reasonable TDP on the 45nm process. Since then, they've apparently broken down it into certain evolutionary steps. Intel's douchebaggery with ISA's also doesn't help much. They keep willy nilly moving the goalpost. Remember SSE5? Now they're doing the same with FMA.

[dess]

nightmare, but not unlikely

I hope we will all be waken up 3 days later with a big "Phew!"...

Do you have access to the benches under NDA yet?

Yes?

...kind of anti-competitive don't you think? A bit of a Monopoly, don't you think?

Definitely. And there is more to it: it's againt the interests of the whole industry.
That's why I for one won't go for SB even if BD is worse.

Can I sincerely ask how are these (i7 numbers) possible with stock ram frequency? I mean, top bandwidth for DDR3-1600 (the max. that SB officially supports) 12800 MB/s... Even with DDR3-1866 you get 14933...
http://en.wikipedia.org/wiki/DDR3

AMD wants to keep Intel in the dark, and have shown they're capable of keeping a secret (Eyefinity, RV770 shader count)

It was surely the case until now. But, if there is anything that can help BD, I don't think they're holding it back intentionally, anymore. Look what I've wrote about it earlier... Perhaps they're still fiddling with AGESA to find some nasty bugs, or something... But, the management said no more delays, no matter if they're able to find a solution before lanuchday or not. I don't think it will come in time, but perhaps somewhat later.

Why BD chip is so big in the first place?

BD surely should be capable of better performance to justify it's size.
Although, cachesizes also have a role:
SB: 1 MB L2 + 8 MB L3 = 9 MB total
BD: 8 MB L2 + 8 MB L3 = 16 MB total

Because if it is actually worse, then it makes no sense at all to release it.

O.C. could justify it... That way you can top K10.x performance.
Don't forget FX is not a mainstream productline... It's Black Edition, meant for O.C.
Probably it wasn't the original plan, though.

[xdan]

Memoriile folosite pentru ambele platforme au fost A-Data 2 x 2GB XPG Plus 2200MHz CL8 echipate cu chipuri Elpida Hyper. Acestea au fost setate la 1866MHz cu latentele 8-8-8-24 1T in cazul ambelor platforme.

The memory was set at 1866 CL8, and may be with Hypers even some more latency where lowered.

Can I sincerely ask how are these (i7 numbers) possible with stock ram frequency? I mean, top bandwidth for DDR3-1600 (the max. that SB officially supports) 12800 MB/s... Even with DDR3-1866 you get 14933...

14933 at 1866CL9 may be with AMD...

http://www.xtremesystems.org/forums/...xtreme4-Review

[maltrabob]

@Apokalipse: I really do admire your bravery to claim such opinions publicly :-). Personally, I think there is a possibility that you are right but common sense says otherwise. Either way, I cannot wait to read first reviews on Wednesday.

[dess]

The memory was set at 1866 CL8, and may be with Hypers even some more latency where lowered.

Isn't 20865 still too much?

Reading further that Romanian article I've found some other "interesting" bits (Googlish):

5066MHz with a voltage high frequency power was obtained 1.475va with a minimum of stability. I had full stability at frequencies of 4700-4800MHz, which is nothing like Sandy Bridge where most can run 5.1-5.2GHz stable.

Is it really the case...? I've heard most top at 4.7-4.8, just like BD. And some say you need a better cooler for that, just like with BD.

The stock voltage of 1.4v I noticed just scaling up to 1.475v, further having apparently need a better cooling. Worrying was the fact that although we have not increased too much pressure, ammeter began to show alarming levels when we made ​​some runs at 4.8 GHz of Cinebench ... 22.4 A, which translates to ~ 268W. Let us imagine for a second what it means and frequencies above 5 GHz 1.55v should be put into operation another reactor at Cernavoda.

How funny... Anyway, in case 1.55V is really too much (is it?), just why they didn't went up to 1.5? Perhaps because BD would have reached 5.1-5.2, indeed?

This is a company that doesn't give a rat's ass about it's consumer base.

BS! Then why they've made AM2+/AM3/AM3+ as much backwards/forwards compatible as possible? Why they've changed plans and now going to release Piledriver on AM3+, as well?

[Manicdan]

Reading further that Romanian article I've found some other "interesting" bits (Googlish):

Is it really the case...? I've heard most top at 4.7-4.8, just like BD. And some say you need a better cooler for that, just like with BD.


How funny... Anyway, in case 1.55V is really too much (is it?), just why they didn't went up to 1.5? Perhaps because BD would have reached 5.1-5.2, indeed?

im thinking the reviewer needs to learn a little more about overclocking. using the stock heatsink is a bad idea when it comes to a chip that clearly scales due to cold, not volts. SB is rather simple, you up the volts a little and just overclock, ignoring temps. but with thuban and apparently the same with BD, you need to make sure you balance temps with volts. seeing 4.8ghz on stock heatsink is quite nice, since it does confirm that 5ghz should be easy for WC or bigger heatsinks.