-
It seems you have a pessimistic view of semiconductor specifications. In reality, the large semiconductor companies are very careful in their released specifications. On most high volume parts, they have spent millions of dollars and thousands of man hours on reliaibility testing and qualification. Their industrial customers rely on the parts being able to meet the specs that are published. If a large semiconductor company claims the part will meet a certain spec, you can bank on it.
No need to explain the physics of semiconductors to me. But you seem to have an ivory tower view of semiconductor manufacturing. People have been making similar claims about the limits of semiconductor processing for decades. And they have been continually proven wrong as clever process engineers and resourceful manufacturing equipment designers find ways to keep pushing the limits further out. As for patents, certainly many process patents are filed, but many important process techniques are kept as trade secrets, for various reasons.
As for "order of magnitude", no, not if you mean a factor of 10, as that phrase usually means. When the 3Xnm flash first came out, 5000 erase cycles was not uncommon. With the 25nm flash from IMFT, I have heard both 3000 and 5000 erase cycles. So unless you are claiming that the physics dictate that the erase cycles from 34nm to 25nm must go from 5000 to 500, it is not an order of magnitude. Besides, the 3Xnm flash currently has numbers ranging from 3000 to more than 10,000. You know why? Process improvements and binning. The SSDs usually get the best chips from the wafer. The lower quality chips go to less demanding applications, like USB sticks and consumer electronics like cell phones or media players.
Last edited by johnw; 06-21-2011 at 03:50 PM.
Tags for this Thread
Posting Permissions
- You may not post new threads
- You may not post replies
- You may not post attachments
- You may not edit your posts
-
Forum Rules
Bookmarks