AMD Zambezi news, info, fans !

[Apokalipse]

One x86 core consists of an integer unit and floating point unit.
One bulldozer module contains two of each.

The FPU's just share a single scheduler, allowing them to ALSO process 1 x 256-bit instruction (decoded into 2 x 128-bit micro-ops) on top of being able to process their own threads separately.
micro-ops belonging to two threads can be issued by the FP scheduler simultaneously.

Or another way of looking at it:
a set of hardware capable of processing its own thread independently, without sharing execution pipelines with another thread (HyperThreading). A module can process two independent threads simultaneously (it has the hardware to do it, with both integer and FP instructions)

The way it can use two 128-bit FP pipelines to process one 256-bit AVX instruction could be considered a kind of "reverse hyperthreading"
It only works on instructions wide enough to be able to span across multiple cores