Quote Originally Posted by Khoral View Post
It's not, that's exactly what is said in the article.

Translated from french by myself (sorry for the mistakes) :

The Crucial M4 128 GB we tested combine a Marvell 88SS9174-BL02 controller, a Micron DRAM chip (on its back) and 16 Micron 29F64G08CFACB flash chips. These chips are 25nm and combine two 32 Gb dies. The page size is 4 KB, and the bloc size is 1 MB.

The Crucial M4 256 GB distinguish itself from the 128 GB version by the Flash chips, which are 29F128G08CFAAB. Their capacity is doubled from the use of two 64 Gb dies. This time the page size is 8 KB and the bloc size is 2 MB.
Can you translate/ explain a bit more by what Marc is talking about when he describes benchmark traces being content with indentifying the type of access without considering content. (Page 6)

I don't really understand what he is talking about or how big the advantage is. There is a delay whilst the data source is validated, which does not occur in a benchmark, or the trace time/ sequence allows compression to take place in the time saved by not validating (with a SF drive) ?