AMD Bulldozer server info

[cdawall]

Today JF-AMD confirmed some stuff for me about the new AMD server chips. The new Bulldozer architecture in the server market is a little bit different than the client versions. These chips will still be released under the AMD Opteron moniker which has been around since Sledgehammer K8 was released April 22, 2003. These chips took the market by storm something many hope Bulldozer will do as well. Opteron "Interlagos" and "Valencia" processors have a release date of Q3 2011.

AMD Opteron chips will all contain 4 HyperTrasport links this is to allow them to be used in a multiprocessor environment up to 4 cpu's per client. In addition to this each chip will contain two 128bit memory controllers these memory controllers will allow ganged and unganged usage as is possible on current chips however the pair of 128bit controllers equates to 4 channels not 2 which will be available to desktop chips. Unganged mode will allow simultaneous read/write of 4 memory channels (quad channel) this will substantially increase the performance in server memory.

8 core chips will be native bulldozer chips with the added HyperTransport links and dual 128bit memory controllers.

12/16 core chips will be two dies in a single package. They will be connected via an internal HyperTransport link JF-AMD would not comment on scaling via HyperTransport on the new chips. At initial release the 12 core chips will could be based off of a pair of 8 core dies with 4 cores disabled. If this is true there is a very slim chance mainly due to AMD server chipsets that the 12 core chips could be "unlocked" into 16 core chips. Due to the server environment this is unlikely as the 4 "extra" cores would have been disabled due to defect a word that does not fly well with a server environment or its customers. Eventually we may see a shift to a pair of 6 core dies in a single package. 16 core chips will of course be based off of a pair of 8 core dies in a single package.

Unlike older chips we will not be seeing a Opteron 1XXX series chip on a client board there will not be infrastructure sharing between client and server for Bulldozer based chips. Single Opteron servers will be handled by server series C32 boards. This means we will not have another Opteron 144 which was inducted into the "Hardware Hall of Fame" by UK magazine Custom PC in 2010 as the "The best overclocker's CPU ever made."

Socket C32 is an LGA1207 just like socket F however C32 is keyed differently to prevent mis-insertion of socket F chips which only contain a DDR2 memory controller. This socket will house the AMD Opteron "Valencia" processors.

Socket G34 currently houses "Magny-Cours" Opteron 6100 series cpu's and will be upgradable to Bulldozer-based "Interlagos" Opteron 6200 series processors. This socket features 4 channel (2 per die) memory. Socket G34 CPUs will function with unbuffered ECC or non-ECC RAM in addition to the traditional registered ECC RAM. G34 is a third generation Opteron socket just like C32.

Edit: I have been informed there will be no way to unlock a chip on a server platform...ever.

source: me@ashentech

[FlanK3r]

good news, last days are nice some news about Bulldozer chips

[cdawall]

good news, last days are nice some news about Bulldozer chips

i have been trying to weasel some info out of all of my sources but it has been very tightly lipped lately if i get anything i will post it up

[duploxxx]

lol there is nothing in the comments that was not known yet.....

[MAS]

this is all already known. JF-AMD, tell us something new

[cdawall]

this is all already known. JF-AMD, tell us something new

been trying to squeeze more outta him

[DarthShader]

Ask him, if only two memory channels are enough to feed 8 cores with data. Thuban stopps scaling at 4 cores and beyond. (http://www.tomshardware.com/reviews/...ng,2652-4.html , last table)

I guess it's okay, since situations where memory bandwidth saturation might happen are rather uncommon. And a 980X saturates pretty fast too. (http://www.tomshardware.com/reviews/...ng,2663-4.html , last table).

Been wondering nevertheless.

[informal]

Ask him, if only two memory channels are enough to feed 8 cores with data. Thuban stopps scaling at 4 cores and beyond. (http://www.tomshardware.com/reviews/...ng,2652-4.html , last table)

I guess it's okay, since situations where memory bandwidth saturation might happen are rather uncommon. And a 980X saturates pretty fast too. (http://www.tomshardware.com/reviews/...ng,2663-4.html , last table).

Been wondering nevertheless.

AMD already said publicly that memory BW will be 1.5x higher with Interlagos,with the same number of mem. channels(4). This is achieved partially by improved/redesigned IMC(30%) and support for higher clocked DDR3 memory (20%;1333->1600Mhz).


Zambezi should support 1866 memory and have the same redesigned IMC with the same 30% uplift versus Thuban's.

[DarthShader]

Yes, I have seen that slide. And CPU performance is supposed to go up 1.5x too, right? So, will a status quo remain in this regard?

[ZX2Slow]

I want a 16 core desktop system.

[informal]

Yes, I have seen that slide. And CPU performance is supposed to go up 1.5x too, right? So, will a status quo remain in this regard?

Who cares what's the ratio of mem. BW if Zambezi performs 50% better than Thuban on desktop? AMD clearly designed the better IMC since they are going to need more memory BW to feed those 33% more cores(that are improved Vs Shanghai's cores). In theory,Zambezi could have 1866/1333x1.3=1.81x the BW of Thuban X6;in pure numbers this is 13x1.81=23.6GB/s. As you can see,due to faster memory support,we have 33% more cores with up to 81% higher memory BW so the ratio is not the same.

[Chrono Detector]

I wish this came out for the desktop side, sounds like a killer setup.

[Glow9]

I want a 16 core desktop system.

I'd settle for a 6 core processor that can beat the competitions 4...... Throwing more and more cores onto a chip is kinda pointless when software doesn't take advantage of it. Come on AMD lets get see some performance!

[god_43]

i think bd will be 5-10% slower than sb....i was really hoping for more, but i dont think bd will get there.

[duploxxx]

I wish this came out for the desktop side, sounds like a killer setup.

you can, just buy a c32 mobo and good to go.

[jeremyshaw]

you can, just buy a c32 mobo and good to go.

G34. Has the bigger boys in for it

[eXceeded]

I'm not getting my hopes up until i see solid perf figures, not doing another 6970 on me! I'll probably still get one though, never agreed with Intel mobo's/cpus (made worst by the fact my intel cpus never seem to clock!!!)...

[zalbard]

I'd settle for a 6 core processor that can beat the competitions 4...... Throwing more and more cores onto a chip is kinda pointless when software doesn't take advantage of it. Come on AMD lets get see some performance!

Agreed. 8 threads (hello, HT) are already hard to utilise without crunching.

[JPQY]

Well here a link..from the moment the core 2 duo came out have we in the chess world already a 2048core chess engine!

Think there are more people who use software who needs more cores.There will be never enough cores.

http://www.xtremesystems.org/forums/...d.php?t=202139

In the chess world we are very happy to see these multi core cpu's..most have between 4 & 6 cores systems..and looking forward to see the Bulldozer in action!

JP.

[JF-AMD]

Ask him, if only two memory channels are enough to feed 8 cores with data. Thuban stopps scaling at 4 cores and beyond. (http://www.tomshardware.com/reviews/...ng,2652-4.html , last table)

I guess it's okay, since situations where memory bandwidth saturation might happen are rather uncommon. And a 980X saturates pretty fast too. (http://www.tomshardware.com/reviews/...ng,2663-4.html , last table).

Been wondering nevertheless.

the memory channels will do just fine

[PatRaceTin]

some news from server cpu

[eXa]

Ask him, if only two memory channels are enough to feed 8 cores with data. Thuban stopps scaling at 4 cores and beyond. (http://www.tomshardware.com/reviews/...ng,2652-4.html , last table)

I guess it's okay, since situations where memory bandwidth saturation might happen are rather uncommon. And a 980X saturates pretty fast too. (http://www.tomshardware.com/reviews/...ng,2663-4.html , last table).

Been wondering nevertheless.

They should have tested with higher NB and better ram to get a better picture. Who around here runs with stock nb and dr3 1333 cas 8 ram?

I wonder how the scaling would look with nb @ 2.8+ and some 1800+ low latency ram

[Calmatory]

I'd settle for a 6 core processor that can beat the competitions 4...... Throwing more and more cores onto a chip is kinda pointless when software doesn't take advantage of it. Come on AMD lets get see some performance!

Stop talking out from your ass please. What TIME CRITICAL software does not scale well with cores? Games? 3DMark?

[Solus Corvus]

Stop talking out from your ass please. What TIME CRITICAL software does not scale well with cores? Games? 3DMark?

Well maybe his software doesn't scale with cores. In that situation I'd usually open more processes, but not everyone's usage scenario is going to be the same.

The only thing that matters to me is BD's absolute performance in the apps I use most. Game performance will be weighted rather lightly, I'll have more bias towards database/VM/app and file serving/video editing/software development/etc. If It performs well for my scenario then I will get a few, if not I will get the competition's chip. I hope has good performance for competition's sake, but I'll reserve judgement for actual benchmarks.

[Shadov]

I'd settle for a 6 core processor that can beat the competitions 4...... Throwing more and more cores onto a chip is kinda pointless when software doesn't take advantage of it. Come on AMD lets get see some performance!

I see here some misinterpretation... 4 vs 6?

Keep in mind its not only about core count, but design choices. Intel decided to add 30% die space to have HT, which again gives them 8 threads. AMD decided to invest into a smaller core, which again enables them to fit 6 on a consumer CPU class.

Again why are we focusing on 4 vs 6, forgetting about the HT part which is part of the die and transistor count?

To summarize I hope we will get an affordable solution with good performance, no matter of approach taken by the producer (real cores, ht threads ect.).