Quote Originally Posted by deeperblue View Post
AMD says (http://www.youtube.com/watch?v=VIs1CxuUrpc)
"Synthesizable with small number of custom arrays"
Together with what was said before I think one of the main goals that AMD wants to achieve is to have easily customizable processors. Add a gpu core here, some cache there and another core here. From the slide it looks like lots of their process is already capable of being laid out by a computer.
We have the caches, the integer units and the floating point units being the fixed hand optimized blocks with stuff like the x86 decode organically filling up the space in between. AMD also says it makes it easier to put the whole thing on a different process.

I've only limited knowledge about modern synthesizing and floor planning from working with some FPGAs.
Maybe Hans or somebody in the industry can say something about Bobcat?
Another nice example is the 1.9W TDP 2GHz hardmacro version of the dual
core ARM cortex A9 in the TSMC 40G process (total size of only 6.7 mm2)

http://www.arm.com/products/CPUs/Cor...ard-Macro.html



Regards, Hans