AMD's Bobcat and Bulldozer

[Calmatory]

Anyone willing to take bets on cache inclusiveness/exclusiveness?

I'd bet all I've got for inclusive cache. ..unless cutting the L1D down by 75 % is merely for smaller die size. But in that case it would be only logical to go inclusive, because the benefit of exclusive cache would be lost. This again would require some reworking, but would allow far greater cache latencies and bandwidth. I'd also claim that the increase in performance would be higher than with Athlon II with no L3 vs. PhII with L3, which is around 5-6%, ranging from 0 to ~20%.