Intel plans to deliberately limit Sandy Bridge overclocking

[qcmadness]

I wonder about the relation between the max OC and SB's SSE units,since it looks like intel opted for double pumping the SSE units(hinted by almost equal die are for one SB core and one Westmere core,meaning units are not physically extended like before,but more likely double pumped).

SB has AVX, which may do 1 256-bit SSE instruction or may fuse 2 128-bit SSE instructions into 1 256-bit instruction.