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Thread: [NEW STUFF] Intel LGA1155

  1. #51
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    cool JC, you got next anything interesting?
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  2. #52
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    man you're like the kid on the block that always has the newest nikes.

    hopefully some sort of indication of performance will be "leaked" soon. -_^

  3. #53
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    I think the reason for the short life span of the 1156 is that Intel changed their roadmap due to economic recession/lack of competition/piles of 775's.
    Lynnfield was supposed to show up earlier, and a 32 nm 4C successor was planned, then they changed their plans and messed up the tick-tock strategy.
    To me it's quite obvious that those late change of plans wouldn't change the plans of SB back then, IE maing it backwards compatible.

    Sandy bridge is a fresh start and I guess it's too early to tell if the 1155 will work with Ivy Bridge, but I think it's likely.

  4. #54
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    the only new thing that should come from Intel is reduce in prices,
    that would be REAL big news for everyone, yet, doubtfully, it would come of a single company and not as a new approach in the whole market.
    except from that (not complaining), we've seen 2/4 core chips and 4/8 core chips,
    a bit more cache or some better bclk, open multiplier, or an IGP, is all kid stuff,
    on the paper,
    nothing too glossy or impressive seems to come out of intel's hand, from my pov, @ the next gen. sandy bridge.
    maybe except from that 8 core xeon which is a linear advance,
    the market seems to go on on it's same old way.

  5. #55
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    Quote Originally Posted by jcool View Post
    I would get worked up about Intel going from 1156 to 1155. Except I couldn't care less. I never liked 1156, and to this day still don't like it. This Clarkdale stuff is something I might want in my HTPC or Subnotebook, but that's it really.
    I think LGA1366 is great, yet already old. By the time it's gonna be replaced (Q3 2011), it's gonna be REALLY old. And 32nm Hexas run fine even on boards from 2008, so everything is fine in the high end world. Which means everything is fine with me
    Well said, in with the new and out with the old! I wonder if all sandybridge chips will use the same socket? This is a dual core, I would suspect (wild-assed-guess) that the hexa's and quads will use a different socket (and 22nm octo's may use a diff socket too.) I wouldn't be suprised if sandybridge has 2 sockets for their entry level chips and enthusiast/workstation chips much like 1156 and 1136 now.

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    Thx a lot for this JC!
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  6. #56
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    Quote Originally Posted by Mats View Post
    I think the reason for the short life span of the 1156 is that Intel changed their roadmap due to economic recession/lack of competition/piles of 775's.
    Lynnfield was supposed to show up earlier, and a 32 nm 4C successor was planned, then they changed their plans and messed up the tick-tock strategy.
    To me it's quite obvious that those late change of plans wouldn't change the plans of SB back then, IE maing it backwards compatible.

    Sandy bridge is a fresh start and I guess it's too early to tell if the 1155 will work with Ivy Bridge, but I think it's likely.
    Actually tick-tock strategy still works, just with a two-month shift in each cycle (C2D (August 2006) => Nehalem (November 2008) => SB (Jan-Feb 2011))

  7. #57
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    Quote Originally Posted by mojado View Post


    Source

    1156 owners are happy now (?)
    1156 is a deadend platform, we "sorta" knew this from the start. I think Intel named this one 1155 just to rub it in. How does JC always get the good stuff? N/e ways, thanks. Now...lets see what we're really here to see...OCTSOOI.
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    Quote Originally Posted by saaya View Post
    most people dont care about opencl, physix, folding at home and direct compute... they want cool explosions and things blowing up and boobs jumping around realistically... .

  8. #58
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    Quote Originally Posted by trn View Post
    Well said, in with the new and out with the old! I wonder if all sandybridge chips will use the same socket? This is a dual core, I would suspect (wild-assed-guess) that the hexa's and quads will use a different socket (and 22nm octo's may use a diff socket too.) I wouldn't be suprised if sandybridge has 2 sockets for their entry level chips and enthusiast/workstation chips much like 1156 and 1136 now.


    大脯!
    That's about right. If I'm not mistaken, hexas and octos will be on another socket. Hoping that 45nm->32nm yields Significantly more power-saving, else I might have to knock on AMD's door..
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    Quote Originally Posted by saaya View Post
    most people dont care about opencl, physix, folding at home and direct compute... they want cool explosions and things blowing up and boobs jumping around realistically... .

  9. #59
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    Quote Originally Posted by Etihtsarom View Post
    How does JC always get the good stuff? N/e ways, thanks. Now...lets see what we're really here to see...OCTSOOI.
    He is not alone....
    Intel have been producing Sandy Bridge samples in volume since Q1 2010, and have begun shipping thousands of Sandy Bridge CPU samples to its customers.
    http://vr-zone.com/articles/intel-sh...ples/8860.html
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  10. #60
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    Quote Originally Posted by Olivon View Post
    No bench this time JC ?
    Quote Originally Posted by JCornell View Post
    I think it means he can't post any more than that.
    .

  11. #61
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    Quote Originally Posted by JCornell View Post
    Yet another :banana::banana::banana::banana:.
    WHAT?!
    Where is your legendary desktop wallpaper?

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    Quote Originally Posted by stasio View Post
    Not totally true...
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    Quote Originally Posted by kl0012 View Post
    Actually tick-tock strategy still works, just with a two-month shift in each cycle (C2D (August 2006) => Nehalem (November 2008) => SB (Jan-Feb 2011))
    pff... it never really worked on a 12month cycle, especially in the beginning lol... just check the release dates... but it doesnt matter if its exactly 12 months or 14 months sometimes or even 16months... intel does a really good job with their cpu cycles imo... although recently they have been taking it mighty slow updating their architectures and do baby step after baby step... first integrate on the same package, then on the same die, then actually merge the blocks... just look at pineview it still has the fsb interface for block to block communication within the same die... LOL

    i wonder if sandybridge still uses qpi for block to block communication...

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    "AN INFAMOUS ENTHUSIAST at XtremeSystems called "JCornell" has posted what seems to be the first information about Intel's next generation processor codenamed Sandy Bridge. Sandy Bridge is Intel's 32nm tock and is essentially a Clarkdale 32nm CPU with the 45nm GMCH shrunken to 32nm and merged onto the CPU die. Thats right, while AMD has been talking a lot about fusion for half a decade, Intel seems to be getting there first."

    http://www.semiaccurate.com/2010/04/...bridge-rumors/

    JC on semi accurate radar hhehee
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    Some of their conclusions are pretty misleading (A2 stepping, VRM13, 115X, etc...), however some are pretty true

    Quote Originally Posted by ajaidev View Post
    "AN INFAMOUS ENTHUSIAST at XtremeSystems called "JCornell" has posted what seems to be the first information about Intel's next generation processor codenamed Sandy Bridge. Sandy Bridge is Intel's 32nm tock and is essentially a Clarkdale 32nm CPU with the 45nm GMCH shrunken to 32nm and merged onto the CPU die. Thats right, while AMD has been talking a lot about fusion for half a decade, Intel seems to be getting there first."

    http://www.semiaccurate.com/2010/04/...bridge-rumors/

    JC on semi accurate radar hhehee

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    Quote Originally Posted by saaya View Post
    just look at pineview it still has the fsb interface for block to block communication within the same die... LOL

    i wonder if sandybridge still uses qpi for block to block communication...
    Actually pineview has no FSB and both (mem controller and graphics) are integrated in on the same silicon die. But this dosn't matter because they still comunicate through a main memory. Cache coherent buses (like HTT or QPI) only make sence when cores have a similar cache subsytem. BTW, this applies also to AMD fusion which means that althrough GPU and CPU cores are integrated on the same die, the data exchange will go through the main memory. If I recall correctly, upcoming SB is the only cpu which has different type of cores connected to the same L3 cache. I wonder if Intel will furter improve their GPU drivers to get some help from a SB cores in heavy vertex/geometry calcultions (especialy that SB has doubled its floating point performance relatively to nehalem).

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    Quote Originally Posted by Mumak View Post
    Some of their conclusions are pretty misleading (A2 stepping, VRM13, 115X, etc...), however some are pretty true
    I just look and giggle but the thing is people dont realize what the truth is even if you type out loud like i did about sandy bridge 6/8c being o so different and tweaked that the 2/4c sandy bridge
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    Quote Originally Posted by Mumak View Post
    Some of their conclusions are pretty misleading (A2 stepping, VRM13, 115X, etc...), however some are pretty true
    really? whats misleading?

    btw, thats me... i wrote that thing yesterday night... at 3am... so please dont burn me for getting something wrong ^^

    Quote Originally Posted by kl0012 View Post
    Actually pineview has no FSB and both (mem controller and graphics) are integrated in on the same silicon die.
    really? according to anandtech intel told him it does... and it perfectly explains the memory latency?

    Quote Originally Posted by kl0012 View Post
    But this dosn't matter because they still comunicate through a main memory. Cache coherent buses (like HTT or QPI) only make sence when cores have a similar cache subsytem. BTW, this applies also to AMD fusion which means that althrough GPU and CPU cores are integrated on the same die, the data exchange will go through the main memory.
    i thought they are hooked up to an internal switch? like the xbar between cores and imc on amds multi core cpus?

    Quote Originally Posted by kl0012 View Post
    If I recall correctly, upcoming SB is the only cpu which has different type of cores connected to the same L3 cache. I wonder if Intel will furter improve their GPU drivers to get some help from a SB cores in heavy vertex/geometry calcultions (especialy that SB has doubled its floating point performance relatively to nehalem).
    would make sense... but that would be tricky to load balance with turbo on both cpus and igp... and did it really help a lot on the current implementation? it helps a lot in benchmarks where the cpu is idle, but in games it only gave a 5% boost or so iirc?

    Quote Originally Posted by ajaidev View Post
    I just look and giggle
    hey :P
    at least tell me what i got wrong then :P
    its not like i want to spread nonsense... please lmk!
    Last edited by saaya; 04-22-2010 at 01:57 AM.

  19. #69
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    They don't realize that our words should be treated as
    Quote Originally Posted by ajaidev
    I just look and giggle but the thing is people dont realize what the truth is even if you type out loud like i did about sandy bridge 6/8c being o so different and tweaked that the 2/4c sandy bridge
    Last edited by Mumak; 04-22-2010 at 02:28 AM.

  20. #70
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    I haven't noticed the author..
    Oh Sascha
    You know how to find me... But you also know I'm not allowed to give any details/info..
    Quote Originally Posted by saaya
    really? whats misleading?

    btw, thats me... i wrote that thing yesterday night... at 3am... so please dont burn me for getting something wrong ^^

    at least tell me what i got wrong then :P
    its not like i want to spread nonsense... please lmk!
    Last edited by Mumak; 04-22-2010 at 02:26 AM.

  21. #71
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    So is this a new budget platform for when they finally retire 775?
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  22. #72
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    Weird part is that Intel keeps releasing new LGA775 CPU´s.
    Just wondering.


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  23. #73
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    Quote Originally Posted by Mechromancer View Post
    Intel is evil for changing their socket infrastructure AGAIN! Their CPUs only last one generation per socket. This is not helping the PC's cause. Gamers are going to consoles because of these type of expensive upgrades. Intel NEEDS to pick a single, robust socket infrastructure for their desktop PCs and stick with it through two or more CPU generations. AMD has done it with AM2(+) and AM3 and it has been very successful. QPI is like a better version of Hyper Transport so we all know Intel is fully capable of doing this with their existing sockets.
    I totally agree with that, especially now that mainboards are just a bunch of connectors with no place for innovation or performance improvement.

  24. #74
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    New pr0n. Nice

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    --Snip--
    Last edited by ajaidev; 04-22-2010 at 04:00 AM.
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