Quote Originally Posted by nn_step View Post
Perhaps there is a misunderstanding in what was said.
I am suggesting producing an already validated design [Such as current or previous generation design] on a new process node to reduce production costs in the desktop market.
Unless of course you are suggesting that a design written in VHDL or Verilog, does not function as specified.
My point is that with tight resources, you don't do 2 different designs, just to be ready, in case they are ready early. You have to pick your targets and run with them.

I'd rather have resources working on my next generation project than doubling down on an existing design. It's just about long term vs. short term. But, then again, I am not a desinger, I focus more on the market and I know that putting too much churn on my partners for short term qualifies then they are less likely to want to pick up my products in their lines.