Quote Originally Posted by JF-AMD View Post
The reality is that interim products are not really cost effective. Let's say that GF suddenly called and said "hey, we can get to 32nm in June." If I have Magny Cours coming out in Q1, and Bulldozer coming out in 2011, trying to do an MC design in the back half of the year on 32nm would net a lot of cost and an unoptimized MC. There might be a small benefit, but by the time I could get the product to market, Bulldozer would probably be a quarter away.

OEM partners would not want to do the full validation (and they do that for every node change) so they would pass on the part.

There just isn't benefit, the most profitable answer is to keep to the roadmap and deliver to that, otherwise you impact everything trying to jam an extra project in.

Perhaps there is a misunderstanding in what was said.
I am suggesting producing an already validated design [Such as current or previous generation design] on a new process node to reduce production costs in the desktop market.
Unless of course you are suggesting that a design written in VHDL or Verilog, does not function as specified.