Originally Posted by
Hans de Vries
That's the big mystery question... How do they solve the bandwidth needs.
I somehow thrust the ATI engineers that they made sure that that's ok.
Maybe on a part of the die which hasn't been shown in public yet. or
maybe in cooperation with the DRAM industry + rival NVidia. It's possible
to put main memory in GDDR5 using TSV (Through Silicon Via's) die stacks.
Elpida is already supplying DDR3 TSV die stacks with 8 memory chips in a
package. The 9th chip is the interface chip which can in principle be
replaced by a GDDR5 interface chip.
Regards, Hans
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