AMD talks up its first Fusion chip

[Hans de Vries]

Just a guess...Hans will obviously know more.

1 HT link to the GPU.
1 or 2 HT link(s) between the CPU cores.
1 HT link to the rest of the system. (PCI-E bus, southbridge, add in card, etc...)

Yes, interesting all these HT links... They are half width but probably
almost as fast as the full width HT's used up to now (>=6.4GHz)

Maybe for 2 dies per package for higher performance desktops?

or also for the HPC market (CRAY) to build supercomputers getting
a whole lot more TFlops from the GPU's?

or maybe one is used to transport monitor output data to the
South bridge?

Regards, Hans