I could have sworn reading a news article on this. I believe it was from BSN.
Ah, yup I am right. Here is the article in question. Some interesting quotes:
So yes it looks like the current numbers of 520 and 630GFlops are in fact based on A2 silicon, and A3 should up this considerably, as even Charlie admits in one of his latest editorials ("A3 will almost assuredly up the clocks quite a bit...").According to specifications based on NV100 A2 silicon [subject to change], C2050 will deliver 520 GFLOPS of IEEE 754-2008 Dual Precision format and 1.040 TFLOPS of single precision.
First and foremost, Tesla is the slowest clocked member of Fermi-GPU architecture as it has to qualify for supercomputers. ... In order to satisfy the required multi-year under 100% stress, nVidia Tesla C2050/2070 went through following changes when compared to the Quadro card [which again, will be downclocked from the consumer cards]:2-bit ECC is necessary for high precision HPC applications (i.e. medical imaging). ATI only has 1-bit ECC on the video memory, which isn't enough. Nvidia has 2-bit ECC on the video memory and the entire cache hiercharchy.ECC will be disabled on GeForce cards and most likely on Quadro cards
I am not the signer of the NDA, I know someone who is and NDA was broken when they talked to me. I will reveal general information that can't be traced back to the NDA signer. Whether or not you choose to believe me is out of my control. Irrelevant though as it will be revealed to everybody in Q1.
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