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Thread: The GT300/Fermi Thread

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  1. #1
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    Still waiting to see if fermi is real....
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    Quote Originally Posted by Vit^pr0n View Post
    Can we just ban this guy? We don't need people coming in here claiming they know someone that's under NDA. Everything that comes out of this posters posts are nothing but delusions from a fanboy.

  2. #2
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    Quote Originally Posted by skugpezz View Post
    Still waiting to see if fermi is real....
    Oh the Fermi is real! Just it's going to be a long wait if the Quadro Cards are not coming until Q2 2010

    003 I am not sure if the Quadro Fermi clocks will be lower? (granted they might be on the memory), I am going by the Quadro FX5800 which had a Core Clock of 650Mhz compared to the GTX 280 which had a core clock of 600Mhz

    Now, BFG will most likely do an OCX, Gainward a Golden Sample and EVGA a WTF, BBQ FTW edition with higher clocks, but the fact remains we have no idea whether the Quadro cards will be clocked higher, lower, or the same as the consumer cards.

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  3. #3
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    Quote Originally Posted by JohnZS View Post
    Oh the Fermi is real! Just it's going to be a long wait if the Quadro Cards are not coming until Q2 2010

    003 I am not sure if the Quadro Fermi clocks will be lower? (granted they might be on the memory), I am going by the Quadro FX5800 which had a Core Clock of 650Mhz compared to the GTX 280 which had a core clock of 600Mhz

    Now, BFG will most likely do an OCX, Gainward a Golden Sample and EVGA a WTF, BBQ FTW edition with higher clocks, but the fact remains we have no idea whether the Quadro cards will be clocked higher, lower, or the same as the consumer cards.

    John
    I could have sworn reading a news article on this. I believe it was from BSN.

    Ah, yup I am right. Here is the article in question. Some interesting quotes:
    According to specifications based on NV100 A2 silicon [subject to change], C2050 will deliver 520 GFLOPS of IEEE 754-2008 Dual Precision format and 1.040 TFLOPS of single precision.
    So yes it looks like the current numbers of 520 and 630GFlops are in fact based on A2 silicon, and A3 should up this considerably, as even Charlie admits in one of his latest editorials ("A3 will almost assuredly up the clocks quite a bit...").
    First and foremost, Tesla is the slowest clocked member of Fermi-GPU architecture as it has to qualify for supercomputers. ... In order to satisfy the required multi-year under 100% stress, nVidia Tesla C2050/2070 went through following changes when compared to the Quadro card [which again, will be downclocked from the consumer cards]:
    ECC will be disabled on GeForce cards and most likely on Quadro cards
    Quote Originally Posted by LordEC911 View Post
    Also there are cases were AMD/ATi's ECC implementation will be better/faster than Nvidia's since in the case where Nvidia's ECC will actually try to correct the error and once it realizes it cannot be corrected it will still need to be flushed and redone.
    2-bit ECC is necessary for high precision HPC applications (i.e. medical imaging). ATI only has 1-bit ECC on the video memory, which isn't enough. Nvidia has 2-bit ECC on the video memory and the entire cache hiercharchy.

    Quote Originally Posted by Teemax View Post
    First you claimed you cannot "break" NDA.
    Immediately after, you "broke" NDA by claiming that Fermi is significantly faster.
    I am not the signer of the NDA, I know someone who is and NDA was broken when they talked to me. I will reveal general information that can't be traced back to the NDA signer. Whether or not you choose to believe me is out of my control. Irrelevant though as it will be revealed to everybody in Q1.
    Last edited by 003; 12-17-2009 at 01:05 AM.
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    Quote Originally Posted by 003 View Post
    I could have sworn reading a news article on this. I believe it was from BSN.

    Ah, yup I am right. Here is the article in question. Some interesting quotes:

    So yes it looks like the current numbers of 520 and 630GFlops are in fact based on A2 silicon, and A3 should up this considerably, as even Charlie admits in one of his latest editorials ("A3 will almost assuredly up the clocks quite a bit...").





    2-bit ECC is necessary for high precision HPC applications (i.e. medical imaging). ATI only has 1-bit ECC on the video memory, which isn't enough. Nvidia has 2-bit ECC on the video memory and the entire cache hiercharchy.



    I am not the signer of the NDA, I know someone who is and NDA was broken when they talked to me. I will reveal general information that can't be traced back to the NDA signer. Whether or not you choose to believe me is out of my control. Irrelevant though as it will be revealed to everybody in Q1.
    No ATI does not have 1bit ECC, it has a EDC based based on parity bit most likely. The ECC also use's EDC BTW there are two stages in how ECC works it detects then it try's to fix the error.

    But if unsuccessful it requests the data again, EDC "In ATi's case" always requests the data again it does not try and fix the error. In a case where the error can not be fixed and timeout occurs EDC will be faster than ECC.

    The only two things that fermi really has are a very flexable design, programmers can make it flip waffles and the fermi has a very nice FP64 FMA execution system...
    Coming Soon

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    Quote Originally Posted by ajaidev View Post
    No ATI does not have 1bit ECC, it has a EDC based based on parity bit most likely. The ECC also use's EDC BTW there are two stages in how ECC works it detects then it try's to fix the error.

    But if unsuccessful it requests the data again, EDC "In ATi's case" always requests the data again it does not try and fix the error. In a case where the error can not be fixed and timeout occurs EDC will be faster than ECC.

    The only two things that fermi really has are a very flexable design, programmers can make it flip waffles and the fermi has a very nice FP64 FMA execution system...
    Ok thanks for pointing that out. It seems there are advantages and disadvantages to each implementation but ATI has no form of ECC/EDC on the cache. Also it will be irrelevant on the GeForce cards as ECC will be disabled.
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  6. #6
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    Quote Originally Posted by 003 View Post
    Ok thanks for pointing that out. It seems there are advantages and disadvantages to each implementation but ATI has no form of ECC/EDC on the cache. Also it will be irrelevant on the GeForce cards as ECC will be disabled.
    It most likely will be there people may soft mod it to get ECC. I hope its already started from first because from my experiance with the 5850's EDC really helps reach better freq/stability in memory.

    Also i think the fermis approach to ECC is different than evergreens. Fermi ECC's the data present on the caches and the DRAM but not on the bus "Doing checks on both will add to lag among other things", evergreen doe the opp. it uses EDC on data in the bus not the data present on the cache or the DRAM.

    I hope ECC is there in GeForce fermi's DRAM tough...
    Coming Soon

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