Quote Originally Posted by informal View Post
Face,thanks for posting the slides from pdf . I didn't have the time to upload these,these are good addition to the discussion.Only you should have posted it in other (official) thread too .

I'd expect they did their jobs well and addressed all the potential bottlenecks as good as they possibly could. The FPU units will rely on the L2 cache heavily so I'd expect it will be low latency.
AnandTech said that the FPU will use both L1 caches.
http://www.anandtech.com/cpuchipsets...oc.aspx?i=3674 (just below the second image)

I have one doubt about this core. Will it be able to greatly improve single threaded performance?