Hello folks, thanks to Mechromancer for inviting me although I found the thread before by looking for links to my blogI will try to contribute a bit as time allows.
@informal:
The same paper I found a while back when I was looking for CMT research papers.
@savantu:
Let me bring up my famous predecessor Hans de Vries and his different microarchitecture analysis' which can be found here:
http://www.chip-architect.com/
If we want to look at what somebody wishes, then I'd draw the µArchs of 6 way execution clusters with added DSPs, MEU (multimedia execution unit, was one candidate for being TFP capable - technical floating point with 3 operands and 32 registers.. - which died because of the 64bit mode SSE2 with 16 registers). Or older 8 way Archs, 2 cluster variants. That all has been in older patents, where it appeared and disappeared in phases, maybe in relation to designs being continued or getting scrapped. Let's remember all those scrapped K9 designs and reiterated Bulldozer etc as we heard it from certain news/rumor sites.
Some interesting architecture, still originating from rather old patents, already looks somewhat similar to what we find today:
http://www.chip-architect.com/news/2...hitecture.html
But in case of AMD I think we can take patents in a different way. Intel, IBM and other large companies have a lot of people working on such designs and try to cover many ideas to fill their IP pool. AMD is not so much IP oriented (just protecting itself somehow) because it can't afford to pay for tons of potentially useless patents and waste a lot of the design teams' time for developing "fun architectures" and patenting them. However, if someone developed an idea with some future potential, they might patent it just in case. That likely happens often during the early design stages.
There are many Intel patents looking like not related to anything known or planned, just ideas, which might be useful at some point in the future. But I don't look at that stuff. I just try to find common things in a lot of patents and ideas which look useful or fit to current and older academic research (CPU manufacturers or designers are often trailing current research by many years even before starting a design).
So since AMD is producing loss after loss each quarter, they have to focus on the really important things to do.
And if there is some truth in what Charlie Demerijan seems to know about the core, then what I found fits rather well to his statements like shared FPU, 2 int clusters and so on.




I will try to contribute a bit as time allows.

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