ASUS Maximus II Formula - new P45 king?

[powellandy]

Hi

New here. Thought I would share my experience with the M2F. System - M2F BIOS 1501, Q9300, Freezer 7 Pro cooler, 2x2GB Corsair Dominator 8500, BFG 8800GTS (G92), Hiper PSU, Antec P182 Case.

Process
Needed NB 1.15 and vCore 1.2 to boot. Worked at getting Linpak x10 stable. Required vCore 1.3375 and vNB 1.32. However by putting the 1/3 GTLs onto -35 (aiming for about 0.635) and vTT up to 1.20600 I was able to get the vCore down to 1.26875.

Then tinkered vNB down to 1.28 to get OCCT RAM 8h stable however by putting NB GTL to +30 (aiming for .67) I was able to drop this one notch.

It seems vTT and the GTLs are key as I was able to drop the vCore 1.3375 to 1.26875 and vNB from 1.32 to 1.27.

The things that didn't help
DRAM Clock Skew - made more unstable with progressive increments.
NB/CPU Clock Skew - made no difference (delay 100/300 respectively)

Final settings.

Note: Not stable with 1602 so back to 1501.

Ai Overclock Tuner : Manual
CPU Ratio Control : Manual
- Ratio CMOS Setting : 7.5
FSB Frequency : 425
CPU Clock Skew : Normal
North Bridge Clock Skew : Normal
FSB Strap to North Bridge : 266
DRAM Frequency: DDR2-1066
Dram Clock Skew CH1 A1 : normal
DRAM Clock Skew CH1 A2 normal
Dram Clock Skew CH1 B1 : normal
Dram Clock Skew CH1 B2 : normal

DRAM Timing Control: Manual
CAS# Latency : 5
RAS# to CAS# Delay : 5
RAS# Precharge : 5
RAS# ActivateTime : 15
RAS# to RAS# Delay : auto
Row Refresh Cycle Time : auto
Write Recovery Time :auto
Read to Precharge Time : auto
Read to Write Delay (S/D) : auto
Write to Read Delay (S) : auto
Write to Read Delay (D) : auto
Read to Read Delay (S) : auto
Read to Read Delay (D) : auto
Write to Write Delay (S) :auto
Write to Write Delay (D) : auto
Write to PRE Delay : auto
Read to PRE Delay : auto
PRE to PRE Delay : auto
ALL PRE to ACT Delay : auto
ALL PRE to REF Delay : auto

DRAM Static Read Control: Disabled
Dram Read Training : Disabled
MEM OC Charger : Disabled
Ai Clock Twister : Moderate
Transaction Booster : Manual

Common Performance Level [8]

Pull-In of CHA PH1 Disabled
Pull-In of CHA PH2 Disabled
Pull-In of CHA PH3 Disabled
Pull-In of CHA PH4 Disabled
Pull-In of CHA PH5 Disabled
Pull-In of CHB PH1 Disabled
Pull-In of CHB PH2 Disabled
Pull-In of CHB PH3 Disabled
Pull-In of CHB PH4 Disabled
Pull-In of CHB PH5 Disabled

PCIE Frequency : 101

CPU Voltage : 1.26875
CPU PLL Voltage : 1.50
FSBT : 1.20600
DRAM Voltage : 2.19750
North Bridge Voltage : 1.27225
South Bridge Voltage 1.5 : 1.5
South Bridge Voltage 1.1 : 1.1

CPU GTL Reference 0 : auto
CPU GTL Reference 1 : -35
CPU GTL Reference 2 : auto
CPU GTL Reference 3 : -35
North Bridge GTL Reference : +30
DDR2 Channel A REF Voltage : AUTO
DDR2 Channel B REF Voltage : AUTO
North Bridge DDR Reference : AUTO

Load Line Calabration : Disabled
CPU Sread Spectrum : Disabled
PCIE Spread Spectrum : Disabled