Once you reach the limits of your current DRAM frequencies on sane voltages, and limits of timings, skewing the clocks correctly will let you push farther on this bound at the same or less voltage. Basically it will boot or it wont with advance or delayed skews at a DRAM frequency greater than the limit without any skew adjustment. It may also get rid of persistent errors, I use Memtest86+ to see what kind of results clock/cmd skew adjustment has for a given value. If i know the DRAM frequency turns up errors, adjusting the skews either way will either make these errors become fewer to none or increase even more. I use tests 5/6/7 for the most part. These seem to find errors in memory quickly. You press 'c' for configuration, '3' for test select, 'x' for individual test, then '0' to go back to testing.Mikeyakame: Thank you TONS for the reply. I'll be back with questions, I'm sure. I just need time to read, digest and test out all of the information you've provided.
In addition to all of the great information you've provided, I guess I'm also looking for how each of the settings would benefit my o/c one way or the other. For example, how to I diagnose whether or not bumping a setting one way or another is going to be the thing I need in order to fix my lack of stability.
IE: What feedback, in terms of instability, would I get that would tell me, "Hey, you need to bump your CLK Skew down one ps or up one ps."?
Saves running repeated tests which you know pass. 32bit integers, memory moving and random number generation are all critical of bit for bit correct read/writes.


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