They can't really shrink to much efficiency, they have to get a balance between the bus width (too big) and ROP count (too much). 384bit + GDDR5 in the future seems to be the best balance, otherwise they'd still have to use a 400+mm^2 die in 40nm!
40nm should allow them to shrink the core to ~220mm2, so +400mm2 for a dual GPU card.
Originally Posted by Macadamia
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