1. While TSMC can hit the shrink nodes a bit quicker, performance wise I recall TSMCs significantly poor performing (parametrically) than AMD's.
2. Not certain myself, I have not seen any company publish quality control data (i.e. yields).
3. This is an interesting proposition, at first thought -- just knee-jerk thoughts -- SOI would be somewhat difficult to implement in a 3D stacked arrangement simply because SOI requires fairly rapid thermal transfer to avoid self-heating problems.






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