ABit AX78 Overclocking/Stability

[KTE]

Hehehe

He's right though

[KTE]

You can see my latest here and here

Board is going solid! I've not added any voltage yet though..

This is where Abit utility/BIOS reads sensors from:

;===========================================================
;	W83627EHF Index and Internal Pin Define
;===========================================================
;	Pin name			Index	Bank		
;	---------			----	----
;	"VCORE"			0x20	0
;	"VIN0"			0x21	0
;	"VAVCC"			0x22	0
;	"V3VCC"			0x23	0
;	"VIN1"			0x24	0
;	"VIN2"			0x25	0
;   	"VIN3"			0x26	0
;	"VSB"			        0x50	5
;	"VBAT"			0x51	5
;	"VIN4"			0x52	5
;	"CPUTIN"			0x50	1
;	"AUXTIN"		        0x50	2
;	"SYSTIN"		        0x27	0
;	"SYSFANIN"		      0x28	0
;	"CPUFANIN0"		0x29	0
;	"AUXFANIN0"		0x2A	0
;	"CPUFANIN1"		0x3F	0
;	"AUXFANIN1"		0x53	5
===========================================================

[justapost]

;===========================================================
;	W83627EHF Index and Internal Pin Define
;===========================================================
;	Pin name			Index	Bank		
;	---------			----	----
;	"VCORE"			0x20	0
;	"VIN0"			0x21	0
;	"VAVCC"			0x22	0
;	"V3VCC"			0x23	0
;	"VIN1"			0x24	0
;	"VIN2"			0x25	0
;   	"VIN3"			0x26	0
;	"VSB"			        0x50	5
;	"VBAT"			0x51	5
;	"VIN4"			0x52	5
;	"CPUTIN"			0x50	1
;	"AUXTIN"		        0x50	2
;	"SYSTIN"		        0x27	0
;	"SYSFANIN"		      0x28	0
;	"CPUFANIN0"		0x29	0
;	"AUXFANIN0"		0x2A	0
;	"CPUFANIN1"		0x3F	0
;	"AUXFANIN1"		0x53	5
===========================================================

Thank you for the effort KTE.

So ABit AX78 uses the W83627EHF sensor chip. This table seems to be the label mapping for this chip.
I'd need a list of detected chips from the SMBus interface. I explained it as far as i could over at the Unified DFI thread.

I wonder if the freezing might also occure if one of those better clockers run with a too high voltage for them.

[hokiealumnus]

Thank you for the effort KTE.

So ABit AX78 uses the W83627EHF sensor chip. This table seems to be the label mapping for this chip.
I'd need a list of detected chips from the SMBus interface. I explained it as far as i could over at the Unified DFI thread.

I wonder if the freezing might also occure if one of those better clockers run with a too high voltage for them.

+1. Great info to know, both of you. Thanks!

[KTE]

Latest stable so far: 3000-2900-2700-2800 (MHz) stock volts
12W AC higher full load power than stock 9850



Still testing...

I'd need a list of detected chips from the SMBus interface. I explained it as far as i could over at the Unified DFI thread.

Can't get any info, installed Etch and started Lm-sensor detection and system froze
Does not happen with Ubuntu, its a Debian thing it seems.

This is the only official info I know, not much there though;

I wonder if the freezing might also occure if one of those better clockers run with a too high voltage for them.

Hmm.. I've already done this test quite a while ago. With mine what caused freezing at stock volts also caused it at 1.55v - if it was idle instable, its always idle instable no matter what you do

For me, its just some weaker cores, I mean, you can see my above results and compare that I was stuck at 2700MHz before max

[KTE]

BTW, AMD advisory lately released a public report about the consumers wrongly choosing low end, budget and mainstream motherboard designs for high performance processors, which they said is completely asking for trouble as they weren't designed for it. Since then a lot of major distributors/retailers are placing a cautionary advisory under the motherboard specs. Just FYI:

The vast majority of the 780G boards have a three-phase or four-phase PWM circuitry design. These designs are completely acceptable for the 45W, 65W, 89W, and 95W TDP rated processors; however, drop in a 125W TDP processor such as the Phenom 9850e or 6400+ X2 and you are asking for trouble

EDIT: As I said right at the start, with appropriate cooling, many will have no problemo. They need to do a lot more before trying to hurl out half-done articles causing mayhem and those without knowledge to just follow.
AT updated their initial blogs: http://www.anandtech.com/mb/showdoc.aspx?i=3299&p=1 [I've snipped]

It is time to introduce the fine print and disclaimers when using these boards with a Phenom 9850BE. As a recap, the critical aspect of running a 9850BE at stock speeds on current 780G products centers on the cooling of the PWM circuitry. Each and every manufacturer along with AMD agreed that cooling the MOSFETS properly was critical to the successful operation of the board at stock or overclocked speeds with the 9850BE - and to some degree, the 6400+ X2. This is based on the board manufacturer utilizing a properly developed power delivery system that is designed to handle the 125W TDP processors and in the future, the upcoming 140W TDP Phenoms.

Everyone probably knows the old saying about the three rules of real estate, location – location – location. It holds true with our board samples only replace location with airflow. We found additional airflow around the PWM/MOSFET area was critical when utilizing the stock retail fan/heatsink in our Silverstone SG03 case. We installed a secondary 120mm fan that provided enough airflow over the board to ensure stable operation under our load scenarios. While that was acceptable for the most part, it did increase noise levels a little more than we expected. In the end, we ended up replacing the stock case fan with one that offered slightly higher airflow with only a small penalty in acoustic levels.

Utilizing our standard test bed components with the 9850BE, we ran our Jetway, ASRock, and Gigabyte boards over 102 hours each with a combination of OCCT, Microsoft Flight Simulator X, and PCMark Vantage benchmark loops. We did this with the case fan modification first and then again with the Thermaltake RubyOrb installed. We did not have any thermal related failures or shutdowns under load as we had experienced with just the retail heatsink installed in previous testing. We also overclocked the 9850BE slightly to 2.7GHz and ran an additional 48-hour combination of OCCT and PCMark Vantage loops without a problem utilizing the two front-mounted case fans and retail heatsink.

Our Biostar and Sapphire boards both passed the 102-hour test. We did experience thermal related shutdowns with OCCT around the 40-minute mark on both boards with just the retail heatsink and standard case configuration. This also occurred around the two-hour mark with PCMark Vantage. In fact, we had Biostar send us another board after a bad overclocking experience (our fault for trying) with the 9850BE on an open test bed setup. We did not test either board in an overclocked condition but feel safe in their capabilities to run the 9850BE at stock settings with proper cooling.

The ABit AX78 would definitely be fine if those are, it has much better PWM area and the heatsink if installed properly - I idle 31°C PWM and 27°C surface heatsink temp with stock volts 3000/3000/2700/2800 MHz 9850BE, 25°C ambient - sub 43°C under load

[Cheffy]

as i mentioned earlier - the shutdown under load with higher clocks/volts is the ocp protection on the pwm controler.
i have a pretty good idea how to up the limit but lack the tools to do it. we need to alter the values of 4 surface mount resistors and pencil jsut sint going to cut it as we need the final resistances to be as near as possible exactly the same.

OFC we need to be aware of the warning given above, but i have quiet confidence given that the 4 phase system on my old abit AX8 survived 3200mhz/1.75V on my old X2 without any heatsinking and we used to have many a board running 2 phase on 70w thunderbirds - so it should be technically possible.

ill dig up the spec sheets for the FETS if anyone is interested.
also, fyi, the PWM temp is read from a thermistor positioned right next to the FETS where you would expect to see the LPT port usually, tiny black surface mount component sitting just out from under the heatsink in a big island on the pcb. (i traced it back to the winbond monitor chip in the bottom right corner, close to the C1 led.)

[KTE]

as i mentioned earlier - the shutdown under load with higher clocks/volts is the ocp protection on the pwm controler.
i have a pretty good idea how to up the limit but lack the tools to do it. we need to alter the values of 4 surface mount resistors and pencil jsut sint going to cut it as we need the final resistances to be as near as possible exactly the same.

That would be the case if someone else can run 1.45v load 2.6GHz on a 95W CPU and make it shut down. Unfortunately, some people are running 95W 9500s at those settings, even folding daily without any shutdown, which is roughly 150W draw, so what exactly is the OCP limited to and how to find out?

The current supply on the 9850BE at stock is 92A (mine). 9500 is 76A, 9600BE is the same. CPU maximum Idd value is set at boot.

[justapost]

Can't get any info, installed Etch and started Lm-sensor detection and system froze
Does not happen with Ubuntu, its a Debian thing it seems.

Umm, that's why I run and asked for "i2cdetect 0" first.
That does only detect the addresses where chips live and does not test the chips. I'd not run sensors-detect with a phenom mounted. I tested all other boards i have here with an X2 cpu. The system only froze on the Sapphire board,not on the M3A(770) the GBT780G and the M2A-VM (690G).
Running "i2cdump 0" with the i2c-piix4 and the i2c-dev module loaded did never freeze a system but it makes the smbus/i2c chip unusable till i restart the system (cold start). It does not interfer with the it87 module which is used for the sensor-chips on all of my boards.
I wonder if "i2cdump 0" also shows a chip at 0x2e, whom is responsible for the freezing.
What version of lm-sensors comes with etch? I use lenny so i had the latest stable 3.0.1 version here.

This is the only official info I know, not much there though;

Thanks, that is from the SB600 docs i guess?

Hmm.. I've already done this test quite a while ago. With mine what caused freezing at stock volts also caused it at 1.55v - if it was idle instable, its always idle instable no matter what you do

Yeah but it can be that with 1.55V the bad clocker at stock whould have been stable and the better clocker are causing the freezes now because they do not like those hight voltages.

For me, its just some weaker cores, I mean, you can see my above results and compare that I was stuck at 2700MHz before max

For the p-states amd says the multis and dividers must be equal for all cores.
We know that this is no requirement but I'm not so sure if it will not cause problems 24/7 longterm.
My last 9850BE also had a bad third core and the fourth also was no good clocker. Cores one and two ran 3GHz at ~1.325V.

[KTE]

New update - core0 3000 stable stock volts, but core1 will fail, max is 2900 at stock HT - so bump in voltage, now added 0.05v, at 1.344v idle/1.338v load at 3000/3000/2700/2800 testing for another 24 hours or so. No fail yet, just ran 2 benches and EVEREST stability test 30 mins. +1 hr gone now...

Umm, that's why I run and asked for "i2cdetect 0" first.
That does only detect the addresses where chips live and does not test the chips. I'd not run sensors-detect with a phenom mounted. I tested all other boards i have here with an X2 cpu. The system only froze on the Sapphire board,not on the M3A(770) the GBT780G and the M2A-VM (690G).

Yeah, I know what it does but like I said it never worked. Installed latest lm-sensors manually (2.10.1) and then ran i2cdetect 0, never gave any feedback, failed and then second time froze my system. Rebooted and then ran it again, no output. Then ran i2cdetect -l and it again froze my system. No idea if its broken but none of these commands nor sensors-detect does anything odd in Ubuntu, I had tried it once before a few days back.

The guide on lm-sensors mentions clearly that its not safe to run:

WARNING

This program can confuse your I2C bus, cause data loss and worse!

So I'm a bit weary of trying it again, I don't want a screwed up system again like so many times before.

Running "i2cdump 0" with the i2c-piix4 and the i2c-dev module loaded did never freeze a system but it makes the smbus/i2c chip unusable till i restart the system (cold start). It does not interfer with the it87 module which is used for the sensor-chips on all of my boards.
I wonder if "i2cdump 0" also shows a chip at 0x2e, whom is responsible for the freezing.

Will try in Ubuntu and check - just give me some hours to test stability first.

Thanks, that is from the SB600 docs i guess?

Yes

Yeah but it can be that with 1.55V the bad clocker at stock whould have been stable and the better clocker are causing the freezes now because they do not like those hight voltages.

I didn't understand what you said there

For the p-states amd says the multis and dividers must be equal for all cores.
We know that this is no requirement but I'm not so sure if it will not cause problems 24/7 longterm.

I'm perfectly fine with it since AMD themslves demo'd and allowed us to clock cores individually in their own public software: AOD.
If it was problematic, they wouldn't do that. Anything causing them headaches, they always remove, even if its something rare.

My last 9850BE also had a bad third core and the fourth also was no good clocker. Cores one and two ran 3GHz at ~1.325V.

Looks like mine and yours are similar. Mine is on 3000 1.344v/1.338v idle/load stable now for about an hour. Load, it can do 3055 on all cores at that voltage stable, but idling I'm still testing

[justapost]

Yeah, I know what it does but like I said it never worked. Installed latest lm-sensors manually (2.10.1) and then ran i2cdetect 0, never gave any feedback, failed and then second time froze my system. Rebooted and then ran it again, no output. Then ran i2cdetect -l and it again froze my system. No idea if its broken but none of these commands nor sensors-detect does anything odd in Ubuntu, I had tried it once before a few days back.

Ah ok, thought you ran sensors-detect and not i2cdetect.
Hmm 2.10.1 is an old version. SB700 support was added at 2.10.3 and the latests is 3.0.1. Starting with 2.10.4 there is also a module for your sensor chip available (w83627ehf).
You need SB700 support in i2c-piix4 to dump the i2c/smbus devices.

Will try in Ubuntu and check - just give me some hours to test stability first.

Thanks, I got my hands on the spec of the clock chip they used on the M3A and the Sapphire board, the GBT uses an very similar chip. I also have the specs of the clock chip used on the M2A-VM. So i'll try to write a small kernel module to read out ref HT and pci express clocks. It might be extended to change those frequencies in the future. Depends on how much time it will take.
Yes

I didn't understand what you said there

Say core0 need 1.3V to be stable at 3GHz but it is not stable at say 1.45V.
Core2 is stable up to 2.7GHz with 1.3V and is also stable at 3GHz with 1.45V.
In this situation with 1.45V applied it might be core0 causing the freeze.
It's a vague theory and i don't like those.

I'm perfectly fine with it since AMD themslves demo'd and allowed us to clock cores individually in their own public software: AOD.
If it was problematic, they wouldn't do that. Anything causing them headaches, they always remove, even if its something rare.

Good point.

Looks like mine and yours are similar. Mine is on 3000 1.344v/1.338v idle/load stable now for about an hour. Load, it can do 3055 on all cores at that voltage stable, but idling I'm still testing

The question is, is the goal (3GHz phenom) reached now.

[KTE]

No, not stable
3000/3000/2700/2800 1.344v ID failed just after 2 hours
3000/2900/2700/2800 passed stock volts though.

I think I've reached a limit whereafter voltage won't make a difference. I only want to add upto 1.45v real max, no more but I don't think I can get more out of core1/2/3. Core0 may do 3.1G, I know it'll bench/load test it but it may not be idle stable after 1-2 hours.

Hmm 2.10.1 is an old version. SB700 support was added at 2.10.3 and the latests is 3.0.1. Starting with 2.10.4 there is also a module for your sensor chip available (w83627ehf).
You need SB700 support in i2c-piix4 to dump the i2c/smbus devices.

Ah ok, thanks. The version I downloaded said it was the latest but the version number was exactly what I posted. Nevermind

Thanks, I got my hands on the spec of the clock chip they used on the M3A and the Sapphire board, the GBT uses an very similar chip. I also have the specs of the clock chip used on the M2A-VM. So i'll try to write a small kernel module to read out ref HT and pci express clocks. It might be extended to change those frequencies in the future. Depends on how much time it will take.

Great. Is there a pin on the I/O chip of those chips reading the HT Ref?
I also have the GBT 780G again BTW.

Say core0 need 1.3V to be stable at 3GHz but it is not stable at say 1.45V.
Core2 is stable up to 2.7GHz with 1.3V and is also stable at 3GHz with 1.45V.
In this situation with 1.45V applied it might be core0 causing the freeze.
It's a vague theory and i don't like those.

Agreed, it could be. That's a good point, I'll have to think that over - how to eliminate. Maybe testing by disabling one core at a time would be ok?

I'm not sure but, if you disable a core in Windows but reboot setting say 3000 across all cores in BIOS -- does the 4th core get set to 3000 aswell or do they keep it at stock on boot?

I got into Ubuntu, ran it and got all I/O details fine. Was posting them to you but the system froze (3000/3000/3000/3000 1.355v). So have to go back into now and will post.

[justapost]

Great. Is there a pin on the I/O chip of those chips reading the HT Ref?
I also have the GBT 780G again BTW.

Currently I play with the clockchip of the 690G.

http://www.idt.com/products/getDoc.cfm?docID=18459722
The specs say "An SMbus interface allows full control of the device"

This is a dump of the smbus registers "i2cdump 0 0x64 s"

   0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef
00: 07 ff f0 ff 00 00 62 01 14 e0 e0 54 7d f8 17 de    ?.?...b????T}???
10: 76 f8 17 04                                        v???

The specs say what those mean. Gotta figure out how to read those registers from within a kernel module. That module will provide devices in /proc or /dev whom can be used to read(write) the values.
I'm still very busy at work till june. Have two weeks holiday then and will work on that module then. Meanwhile i'll do some theory (reading other sensor chip module code and stuff at smbus.org).

Agreed, it could be. That's a good point, I'll have to think that over - how to eliminate. Maybe testing by disabling one core at a time would be ok?

I'm not sure but, if you disable a core in Windows but reboot setting say 3000 across all cores in BIOS -- does the 4th core get set to 3000 aswell or do they keep it at stock on boot?

I guess windows does not use the downcore method for unused codes so it will run at 3GHz but do nothing (beside freezing maybe).
On the M3A I disabled cores 3 and 4 via bios and had no freezing issues at 3GHz so I assume disabling via bios is save.
A good test case should be:
1. Disable all cores beside core0 and find the higest voltage and frequency the core can handle. Use the higest voltage as the top limit in 2.
2. Add cores1-3 individual and find the highest voltage and frequency for that core.
3. Use the minimum of the max voltages of all four cores and find the max frequency for each core at this voltage.
4. Enjoy your overclocked system

I got into Ubuntu, ran it and got all I/O details fine. Was posting them to you but the system froze (3000/3000/3000/3000 1.355v). So have to go back into now and will post.

I hope it was due to your multis this time.

[Rammsteiner]

But why are you guys reading/disabling/modifying all those bus things? Are you like fixing the SB600 or something as it should have been.

Also KTE, the results you're getting now, did you get any of these results on any of your other boards like MSI, GB or what else you have? Because it's a little unclear atm for me as you post in all the threads for specific boards telling you get x results and I dont understand anymore if that's only with the Abit or if you got it on other boards as well.

My 4th core (in AOD Core 3) was able to run 5 minutes 2.9Ghz stock Volts. But But AOD is too buggy for me to actually continue testing. If you put all the core multi's at once system might freeze and for some reason some values give me 'Machine Check Exception' BSOD. Well, Im done with it.

Either enable Crossifre on 780a boards, which wont happen most likely, or get SB750 FAST.

[justapost]

But why are you guys reading/disabling/modifying all those bus things? Are you like fixing the SB600 or something as it should have been.

First i want to track down what killed my chip. Second with a module for the clock generator it would be possible to change the ref HT in realtime.
Third, it's a nice playground to get familar with i2c/smbus and i really love getting this lowlevel access to all those chips.

My 4th core (in AOD Core 3) was able to run 5 minutes 2.9Ghz stock Volts. But But AOD is too buggy for me to actually continue testing. If you put all the core multi's at once system might freeze and for some reason some values give me 'Machine Check Exception' BSOD. Well, Im done with it.

Either enable Crossifre on 780a boards, which wont happen most likely, or get SB750 FAST.

You can use sam2008's tool or crystalcpu and modify the multis for each core in the p-state-0 register 0xC0010064.
I wrote in the Official DFI thread at page #24 how you can do that. I'll post a short howto in the Unified thread now.

[Rammsteiner]

Awesome, thx a lot.

Hopefully it will give better results. I think VID options in AOD were bugged too. CPU-Z read 1.232Vcore while AOD set 1.3V as set in BIOS. But without opening AOD CPU-Z read 1.29V which it always did.

Really considering another brand motherboard though when SB750 is out. The noises coming from this board and other issues make me concerned that it might at some point put its finger up in my face and kill everything.

[KTE]

Currently I play with the clockchip of the 690G.

http://www.idt.com/products/getDoc.cfm?docID=18459722
The specs say "An SMbus interface allows full control of the device"

Nice. Why is that showing maximum PLL oc at 280MHz?

This is a dump of the smbus registers "i2cdump 0 0x64 s"

   0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef
00: 07 ff f0 ff 00 00 62 01 14 e0 e0 54 7d f8 17 de    ?.?...b????T}???
10: 76 f8 17 04                                        v???

The specs say what those mean. Gotta figure out how to read those registers from within a kernel module. That module will provide devices in /proc or /dev whom can be used to read(write) the values.
I'm still very busy at work till june. Have two weeks holiday then and will work on that module then. Meanwhile i'll do some theory (reading other sensor chip module code and stuff at smbus.org).

Where's the register encodings mentioned? I've not come across them yet, would be cool. Thanks.

I guess windows does not use the downcore method for unused codes so it will run at 3GHz but do nothing (beside freezing maybe).
On the M3A I disabled cores 3 and 4 via bios and had no freezing issues at 3GHz so I assume disabling via bios is save.
A good test case should be:
1. Disable all cores beside core0 and find the higest voltage and frequency the core can handle. Use the higest voltage as the top limit in 2.
2. Add cores1-3 individual and find the highest voltage and frequency for that core.
3. Use the minimum of the max voltages of all four cores and find the max frequency for each core at this voltage.
4. Enjoy your overclocked system

Yeah I'm going to test something similar.

I hope it was due to your multis this time.

Yeah, speed was unstable

Also KTE, the results you're getting now, did you get any of these results on any of your other boards like MSI, GB or what else you have? Because it's a little unclear atm for me as you post in all the threads for specific boards telling you get x results and I dont understand anymore if that's only with the Abit or if you got it on other boards as well

MSI and Abit, nothing else yet. Haven't had GBT DQ6/DS5 for a long time now, but do have GBT 740G and 780G boards.
Borrowing spare MSI from work friend, mines dead.

[justapost]

Nice. Why is that showing maximum PLL oc at 280MHz?

Still figuring out how the ref HT is generated out of all those settings. The board is not limited to 280MHz.

Where's the register encodings mentioned? I've not come across them yet, would be cool. Thanks.

In the datasheet at page 10-14. PM me an email if you are interested in the datasheet for the 9LPRS477C (9LPRS477CKL used on the GBT board, 9LPRS477BKL on M3A and Sapphire, I expect it's very similar to the C version but without a gpu frequency).

You used an phenom while you dumped i2c-0 under ubuntu? I wonder why you do not get interfaces at 0x4c and 0x47. At 0x4c seems to be the svi interface. It's dumps change if i change the cpu vid or the nb vid in the bios. So with an simple module it's possible to monitor the cpu and nb voltage via that interface on the sapphire board. Gotta figure out the encoding but the dump even changes with 0.00625V step increases in the bios. This increments can not be covered by the VID's encoding the CPU uses, those only allow 0.0125V increments.

[KTE]

Still figuring out how the ref HT is generated out of all those settings. The board is not limited to 280MHz.

According to that data, only HT to 280MHz is defined for the SB600 PLLs with X2s. They don't have data for K10 in there, the new docs are supposed to have released now though.

In the datasheet at page 10-14. PM me an email if you are interested in the datasheet for the 9LPRS477C (9LPRS477CKL used on the GBT board, 9LPRS477BKL on M3A and Sapphire, I expect it's very similar to the C version but without a gpu frequency).

Coming up

You used an phenom while you dumped i2c-0 under ubuntu? I wonder why you do not get interfaces at 0x4c and 0x47.

Yep. Probably not because my BIOS doesn't use SVID interface but the DFI/Sapphire does.

At 0x4c seems to be the svi interface. It's dumps change if i change the cpu vid or the nb vid in the bios. So with an simple module it's possible to monitor the cpu and nb voltage via that interface on the sapphire board. Gotta figure out the encoding but the dump even changes with 0.00625V step increases in the bios. This increments can not be covered by the VID's encoding the CPU uses, those only allow 0.0125V increments.

But the VIDs are different to voltages - are you saying SVID can allow finer voltage control?

If so, then yup that's true.

[justapost]

According to that data, only HT to 280MHz is defined for the SB600 PLLs with X2s. They don't have data for K10 in there, the new docs are supposed to have released now though.

Hmm but i ran an X23800 at 3GHz on this mobo. That is only possible with an 300MHz ref HT. I think bytes 11 and 12 play the main role for the ref HT.

Yep. Probably not because my BIOS doesn't use SVID interface but the DFI/Sapphire does.
But the VIDs are different to voltages - are you saying SVID can allow finer voltage control?
If so, then yup that's true.

There is a PCI register showing whether this SVI SMbus interface exists or not. If Bit 3 is set on your system the interface is unused.
It turned out i was wrong with the chip at 0x4c. This is the thermal interface. Four bytes change their values enormous if I build the kernel and sligthly when in idle.

[KTE]

Hmm but i ran an X23800 at 3GHz on this mobo. That is only possible with an 300MHz ref HT. I think bytes 11 and 12 play the main role for the ref HT.

Sure, that's definitely possible. I'm just commenting on what they wrote and trying to think why?
Even I ran 350HT on 5000+ regular for 2 weeks without a hiccup.

There is a PCI register showing whether this SVI SMbus interface exists or not. If Bit 3 is set on your system the interface is unused.
It turned out i was wrong with the chip at 0x4c. This is the thermal interface. Four bytes change their values enormous if I build the kernel and sligthly when in idle.

Hmm... so which reg is to check for SVI interface then if not that? It must be one of the ones you have picked up on your Sapphire system.

[hokiealumnus]

I can verify, no issues at all with lm-sensors on Ubuntu. sensors-detect is the command I used after installing. It did require a restart though. I'm actually using sensors-applet on my panel 24/7 while folding. Works nicely. Oh...and this is 8.04 x86-64 (duh...can't fold with 32-bit )

[KTE]

I can verify, no issues at all with lm-sensors on Ubuntu. sensors-detect is the command I used after installing. It did require a restart though. I'm actually using sensors-applet on my panel 24/7 while folding. Works nicely. Oh...and this is 8.04 x86-64 (duh...can't fold with 32-bit )

Thanks for the info.
Which sensors does it pick up?

I have 32b but couldn't find any sensor apart from ACPI temp

[hokiealumnus]

Thanks for the info.
Which sensors does it pick up?

I have 32b but couldn't find any sensor apart from ACPI temp

Here's the output:



Obviously, the +12v rail doesn't get read properly (just like my IP35-E) and the alarm ranges are all screwy, but it appears to be ok otherwise. Left the whole SS so you could see sensors-applet doing its thing.

[Jethro]

Good to know this board works well with Ubuntu! Thanks for the info's. It shall become my moderately overclocked office box as soon as the new south bridge mobo's hit the streets Cant believe that I'll have to spend $160+ to get a truly xtreme mobo!!!