Darn, here comes some more science ...
PLL stands for phase locked loop and it is the primary circuit in the processor that sets the overall clock and not necessarily the processor .. PLLs are used anywhere that a device is clocked against a reference where the resulting clock is higher than the reference clock.
It works by taking an input waveform and generating a new waveform that locks it's phase to the incoming but with a multiple of the freqeuncy. This is why traditionally, multipliers have been whole numbers, because to lock the phase you want the generated wave form to start at the same point of the period and end at the same point of the period to remains stable.
Here is a square wave phase locked to a multiplier of 2, top row is input wave form, bottom is output wave form:
++++++++++++++++----------------+++++++++++++++++
++++++++----------++++++++------+++++++++-------.... and so on, the frequency is 2x of the input, phase lock is bolded --- this is just a simple example.
Now you can achived the same lock if you allow the end phase to be exactly 180 degrees out of phase:
++++++++++++++++----------------+++++++++++++++++
+++++++++--------------+++++++++---------------
So the output wave form is 1.5 of the input wave form.... now you have 1/2 multipliers....
Jack
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