Quote Originally Posted by KTE View Post
Lower fab node means a smaller manufacturing process i.e., 65nm to 45nm, or 45nm to 32nm, etc.
High-k allows lower power saving, larger leakage but higher frequnecies.
Low-k allows large power savings, much less leakage but lower frequnecies.
Huh? Low-k and High-k are used in different parts of the chip. They are not exclusive, far from it, you want both of them. You want a process that uses both high and low k.

Low-k has been around for a while. You want to use a low-k material between the interconnects and between transistors to lower crosstalk and parasitic capacitance. Everybody uses some form of low-k these days, there are a number of off-the-shelf solutions available.

High-k and the associated metal gate are something entirely new. High-k is used for the gate dielectric in order to reduce gate leakage and increase gate capacitance. Everyone is working on it, but only Intel has it in production with its 45nm process.

Some useful reading:

http://en.wikipedia.org/wiki/Low-K
http://en.wikipedia.org/wiki/High-k_Dielectric
http://www.spectrum.ieee.org/oct07/5553/1