I'm thinking maybe a bug? At least with the BIOS version I currently have loaded. This is what I've noticed with MemSet. With PL and all phase delays set on auto and the correct configuration the BIOS will set the following. All phases of one channel to 4 and all phases except one or two to 4 on the other channel with the remaining set to 5. Memset will show a PL of 4 for one channel and 5 for the other which means the PL is being set to 5.
However, if i manually configure these settings Memset will show 5 for both channels as if the manually set phases are being ignored. I haven't tries leaving PL set to auto and manually setting the phases yet.




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