The AMD Phenom processor is already available!

[mesyn191]

But that's not a major issue. What is a major issue is that amd positioned the l2 cache in the center of the die so it has a short pipeline and thus has uber low latency. Problem is, the l3 is positioned between 11 friggin layers of metal, so it takes the signal more time to get there, thus the higher latency

Minor nitpics....

IIRC the L2 cache has similar latency to K8 L2, which isn't bad but its hardly "uber low latency". Also the high L3 latency has more to do with the SRAM cell they're using vs. what metal layers its buried in, very hard to get good yields on a SRAM that large+4 cores on a single die, something had to give so they increased their latency requirements.