For the Write Recovery time and the write to Read delay, bios and memset are right; I explain:

Write Recovery time and Write to Read delay are internal dram timing.
There values are usually 3 to 8 for Write Recovery time and 2 to 6 for Write to Read delay.
But memset don't report these value, memset report Write to Precharge delay and Write to Read command delay.

Here is how these value are calculated by the chipsets:

Write to Precharge = Cas - 1 +BL/2 + tWR.
Write to read command = Cas - 1 +BL/2 + tWTR.
BL(Burst Lenght) practically always 8.
tWR(Write recovery time) is 3 for ddr or ddr2/400 and 4 for ddr2/533, 5 for ddr2/667-800.It's can vary.

For example, If your have ddr2/533 and your Cas latency is 4,Write Precharge = 4 - 1 + (8/4) + 4 = 11.

It's the reason that memset report higher values than the bios.
You can see here at page 114 for Intel explanations.