Quote Originally Posted by informal View Post
I already linked to one of the designers of very Bulldozer core. You can start eating ... now. Maybe you are a secret member of Bulldzoer design team ? If you are,then you probably know better than Mr. Christie lol

Also a re-post of my previous post :

More information on AVX support in BD cores,directly from senior architect Mr. Christie,as response to Agner Fog's inquiry in comments section of the blog:


Agner Fog's post at Ace's:


So another confirmation of the topic title and another proof shintai was wrong


* XOP
* FMA4
* CVT16
* SSSE3
* SSE4.1
* SSE4.2
* AVX non-destructive instructions
* AVX 256-bit registers
STOP THIS MADNESS!!! "We Intend To Support" is NOT the same as we support. You're all over the place with this thing, AMD's own documents disprove your point and you seem to be gullible to be pinning all your arguments on a discussion between an engineer and an architect (of some sort). Shintai is right; he was right all along just that some would rather go after him than prove their point - which you're finding hard to do. Jesus!