I actually found running too high VTT (FSB Termination Voltage) caused instability. I also found running the ram on a 5:6 (multiply FSB speed by 1.2) divider really helped with lower PL (thanks to XS). I also had great results running CPU GTL at x.63 and NB GTL at x.67.

I followed the advice here and CLR CMOS and started over with my OC. So I set the voltages, FSB, RAM timings only, and GTL while leaving everything else on auto, then went from there. It helped me lower my NB considerably for the same FSB OC.