FINALLY! Barcelona(s) + Asus L1N64......

[tictac]

HT Link multiplier
Target registers are F0x[0E8,0C8,0A8,088].
Barcelona/K10 is designed to have 4 HT Link,
but it looks that one of them is disabled for current K10 Opteron...
...in this case, F0x0E8 is reserved for 4th HT Link, and it's disabled now.
Then, we can observe the value like 80750660 on F0x[0C8,0A8,088] with MchbarEdit.
From AMD's BIOS and Kernel Developer's Guide, Page 146,
HT Link is set as below:
80750660 = x5
80750560 = x4
80750460 = x3
80750360 = reserved (...probably x2.5!? not tested)
80750260 = x2
80750160 = reservied (...probably x1.5!? not tested)
80750060 = x1
We can write desirable value on it, and after rebooting, it should be changed.
# Also we should be able to change HT Link width 8bit/16bit with registers mod
# for F0x[0C4,0A4,084] in similar way, but I've not tested it.

Just to add more information.. with 2 processor install there are 2 Register address need to be set up for both processor to change the HT Link Clock. Which are:

Processor node 0 = Bus#0 Device#24 Function#0 (For processor number 1)
Offset 88h (32bit access mode) LDT Link 0
Offset A8h (32bit access mode) LDT Link 1
Offset C8h (32bit access mode) LDT Link 2
Offset E8h (32bit access mode) LDT Link 3

Processor node 1 = Bus#0 Device#25 Function#0 (For Processor Number 2)
Offset 88h (32bit access mode) LDT Link 0
Offset A8h (32bit access mode) LDT Link 1
Offset C8h (32bit access mode) LDT Link 2
Offset E8h (32bit access mode) LDT Link 3


Here is some guide from me with WPCREdit:
http://www.xtremesystems.org/forums/...&postcount=554

After changing.. REBOOT is required to invoke LDTSTOP_L function and change actual HT-Link