interesting, cpuz doesn't display the l3 cache. I thought only the b0s had the l3 disabled, or do also the b1s then (which by the way, where are the BAs? those should have been out by now)?
Originally Posted by Hans de Vries
JF-AMD posting: IPC increases!!!!!!! How many times did I tell you!!!
terrace215 post: IPC decreases, The more I post the more it decreases.
terrace215 post: IPC decreases, The more I post the more it decreases.
terrace215 post: IPC decreases, The more I post the more it decreases.
.....} until (interrupt by Movieman)
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