Definitely interesting then.

Also, I always through tCWL had to be just below, or at, CAS? IOW if tCL is 16, you'll want tCWL at 14-16. heh On my Llano system (and even my PhenomII I think), any time I'd try and change tCWL to anything less than being 1 below tCL, things would break. Goes to show I really haven't a clue anymore, if I even did in the first place!

Anyways, running at 3.8GHz default voltage (using K17TK) and running RAM at 3333 14-14-14-36 1T 1.36V (1.376V actual) using my 3200 Moderate SubTimings on previous page. 28mins into the AIDA64 stress test running on Cache and System Memory (they create the highest load/power draw), and no problems yet. CPU Temp is 72 (so 52) and RAM is 31C. Best of all? CPU-NB is only at 1.05V ^_^ I did not like seeing them apply 1.15V so willy-nilly like it does, which unfortunately I think is an AGESA change, not a board vendor one. Though it might be. I think Beta 1.72 was applying slightly less NB voltage than what Beta 1.73 does.

Bench results are quite nice, running on 100% identical settings/timings except for RAM speed.
Memory Bandwidth jumped way more than I figured it would.
Read @ 3200 = 53686 MB/s
Read @ 3333 = 56088 MB/s
Write @ 3200 = 52574 MB/s
Write @ 3333 = 55299 MB/s
Copy @ 3200 = 47551 MB/s
Copy @ 3333 = 49113 MB/s
Also there was a rather large and unexpected jump in FP32 test, which makes me think that the increased CCX communication speed has helped.
FP32 at 3.8GHz/3200 = 8652 KRay/s
FP32 at 3.8GHz/3300 = 8815 KRay/s


Also, apparently I was way off on what CLDO_VDDP is for. I thought it was something CPU related, like for the cores and what not, but I guess it's the DDR4 PHY voltage. Sounds like I may have overlooked an option to try for getting moar ram speed!