Quote Originally Posted by Drwho? View Post
I propose you take a simple linear algorithm and run it on one thread, then, count the number of instructions retired, and then, divide by the number of clock ticks ... You ll be surprise ;-)
( make sure your code is totally compute, with 1 to 2 instructions dependency ... )
I guess your point is, that it is next to 1?

Power point are one thing, but measuring and checking yourself is much better ... Otherwise , at 4.2ghz, how could you explain the poor performance of BD on superPI? Low IPC ... Then, ask yourself, if you measure the IPC for each thread, why it never goes about 2 on a single thread ... Please experiment before trying to correct me. I did my homework ;-)
Why should I be interested in code that is more than 10 years old when the Pentium1 was state of art and MMX the most modern instruction set extension? If you want, we can discuss cinebench, much more interesting and BD's performance is very bad there, too. Any guesses what is happening there?

Then , for your intel diagram, you forgot to count code fusion ... SandyB is 4 large + Fusion ... That gives you up to 5!
Well yes, for 2 threads.
Furthermore that's not my diagram, it is intel's diagram ;-) There are only 4 decoders, but these can decode 4+1 x86 instructions. If you say that there are "5 decoders" because of that, then I would assume you work in marketing ;-)

We saw a lot of powerpoint slide, but the measurement don t match what is showed in the ppt, sorry, you assume the marketing slide are correct, this is where is the gap. I looked for everywhere, I could not find anywhere clearly said that it will decode more than 2 per threads, and match it with an ASM code doing more than 2 IPC , did you try?
If you only measure retired instructions then well ... there are only 2 INT pipes, obviously the max IPC of these is 2. Question is now do you want to say that it is only 1 in most cases?
Unfortunately, I cant measure myself, did not buy a BD yet, and I am not sure if I will in the future ;-)

Well guessing from the bad performance numbers I would believe an IPC of ~1. IPC has to be low, obviously. The big question is why. Imo the decoders are the last problem. For example how about AMD's version of Fusion, does that not work?